[PATCH] D99586: [AArch64] Default to zero-cycle-zeroing FP registers.

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer added a comment.

Fair enough, let's refrain from micro-architectural details. But the point is that zero-cost zeroing idioms are supported on integer operations, which is why this is preferred. This should always gives the same or better performance, but it looks like you found a bit of corner case with dual issuing, which is a bit surprising but perhaps makes some sense for smaller in-order cores. I will add FeatureNoZCZeroingFP to the A55's description.


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https://reviews.llvm.org/D99586