[PATCH] D99602: [test, AArch64] Fix use of var defined in CHECK-NOT

Thomas Preud'homme via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 30 09:11:15 PDT 2021


thopre created this revision.
thopre added reviewers: bmakam, qcolombet, t.p.northover, mcrosier, MatzeB.
Herald added subscribers: danielkiss, kristof.beyls.
thopre requested review of this revision.
Herald added a project: LLVM.

LLVM test CodeGen/AArch64/aarch64-tbz.ll tries to check for the absence
of a sequence of instructions with several CHECK-NOT with one of those
directives using a variable defined in another. However CHECK-NOT are
checked independently so that is using a variable defined in a pattern
that should not occur in the input.

This commit removes the definition and uses of variable to check each
line independently, making the check stronger than the current one. It
also removes unnecessary regex match for labels.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D99602

Files:
  llvm/test/CodeGen/AArch64/aarch64-tbz.ll


Index: llvm/test/CodeGen/AArch64/aarch64-tbz.ll
===================================================================
--- llvm/test/CodeGen/AArch64/aarch64-tbz.ll
+++ llvm/test/CodeGen/AArch64/aarch64-tbz.ll
@@ -4,8 +4,8 @@
 ; CHECK-LABEL: test1
 ; CHECK: tbz {{w[0-9]}}, #3, {{.LBB0_3}}
 ; CHECK: tbz w[[REG1:[0-9]+]], #2, {{.LBB0_3}}
-; CHECK-NOT: and [[REG2:x[0-9]+]], x[[REG1]], #0x4
-; CHECK-NOT: cbz [[REG2]], {{.LBB0_3}}
+; CHECK-NOT: and x{{[0-9]+}}, x[[REG1]], #0x4
+; CHECK-NOT: cbz x{{[0-9]+}}, .LBB0_3
 
 ; CHECK: b
 define void @test1(i64 %A, i64 %B) {
@@ -28,8 +28,8 @@
 ; CHECK-LABEL: test2
 ; CHECK: cbz {{x[0-9]}}, {{.LBB1_3}}
 ; CHECK: tbz w[[REG1:[0-9]+]], #3, {{.LBB1_3}}
-; CHECK-NOT: and [REG2:x[0-9]+], x[[REG1]], #0x08
-; CHECK-NOT: cbz [[REG2]], {{.LBB1_3}}
+; CHECK-NOT: and x{{[0-9]+}}, x[[REG1]], #0x08
+; CHECK-NOT: cbz x{{[0-9]+}}, .LBB1_3
 
 define void @test2(i64 %A, i64* readonly %B) #0 {
 entry:
@@ -52,8 +52,8 @@
 ; CHECK-LABEL: test3
 ; CHECK: tbz {{w[0-9]}}, #3, {{.LBB2_3}}
 ; CHECK: tbz w[[REG1:[0-9]+]], #28, {{.LBB2_3}}
-; CHECK-NOT: and [[REG2:x[0-9]+]], x[[REG1]]
-; CHECK-NOT: cbz [[REG2]], {{.LBB2_3}}
+; CHECK-NOT: and x{{[0-9]+}}, x[[REG1]]
+; CHECK-NOT: cbz x{{[0-9]+}}, .LBB2_3
 define void @test3(i64 %A, i64 %B) {
 entry:
   %shift = shl i64 1, 28
@@ -75,8 +75,8 @@
 ; CHECK-LABEL: test4
 ; CHECK: tbz {{w[0-9]}}, #3, {{.LBB3_3}}
 ; CHECK: tbz [[REG1:x[0-9]+]], #35, {{.LBB3_3}}
-; CHECK-NOT: and [[REG2:x[0-9]+]], x[[REG1]]
-; CHECK-NOT: cbz [[REG2]], {{.LBB2_3}}
+; CHECK-NOT: and x{{[0-9]+}}, x[[REG1]]
+; CHECK-NOT: cbz x{{[0-9]+}}, .LBB2_3
 define void @test4(i64 %A, i64 %B) {
 entry:
   %shift = shl i64 1, 35


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