[llvm] 1c3b74f - [AMDGPU] Remove outdated TODOs. NFC

[Sebastian Neubauer via llvm-commits]

Author: Sebastian Neubauer
Date: 2021-03-30T15:18:49+02:00
New Revision: 1c3b74f0ab6d12c8f4052e69301c433b5b647102

URL: https://github.com/llvm/llvm-project/commit/1c3b74f0ab6d12c8f4052e69301c433b5b647102
DIFF: https://github.com/llvm/llvm-project/commit/1c3b74f0ab6d12c8f4052e69301c433b5b647102.diff

LOG: [AMDGPU] Remove outdated TODOs. NFC

spillSGPRToVGPR is already respected in these places since D95768.

Differential Revision: https://reviews.llvm.org/D99570

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIFrameLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
index e7588b7161504..6ae069108adca 100644
--- a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
@@ -951,7 +951,6 @@ void SIFrameLowering::emitPrologue(MachineFunction &MF,
     assert(Spill.size() == 1);
 
     // Save FP before setting it up.
-    // FIXME: This should respect spillSGPRToVGPR;
     BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::V_WRITELANE_B32), Spill[0].VGPR)
         .addReg(FramePtrReg)
         .addImm(Spill[0].Lane)
@@ -969,7 +968,6 @@ void SIFrameLowering::emitPrologue(MachineFunction &MF,
     assert(Spill.size() == 1);
 
     // Save BP before setting it up.
-    // FIXME: This should respect spillSGPRToVGPR;
     BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::V_WRITELANE_B32), Spill[0].VGPR)
         .addReg(BasePtrReg)
         .addImm(Spill[0].Lane)