[PATCH] D99507: [amdgpu] Add a pass to avoid jump into blocks with 0 exec mask.

[Michael Liao via Phabricator via llvm-commits]

hliao added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp:1231
   addPass(&BranchRelaxationPassID);
+  addPass(&SIAvoidZeroExecMaskID);
 }
----------------
foad wrote:
> I don't think you can put anything that inserts extra instructions after BranchRelaxation. Putting it after the hazard recognizer might be risky too. Am I right in thinking that you just want to run this after spills are lowered to real code (prologue-epilogue insertion?)?
branch-relax may convert EXECZ branch to EXECNZ branch or vice versa. I choose to run this pass after branch-relax is just a random choice after the compiler makes the final decision on what branch should be used. I am open to the place where we run this pass to relax the branches.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D99507/new/

https://reviews.llvm.org/D99507