[PATCH] D99467: [AVR] Fix a bug in prologue of ISR
Ben Shi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Mar 28 08:00:36 PDT 2021
benshi001 created this revision.
benshi001 added reviewers: aykevl, dylanmckay.
Herald added subscribers: Jim, hiraditya.
benshi001 requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D99467
Files:
llvm/lib/Target/AVR/AVRFrameLowering.cpp
llvm/test/CodeGen/AVR/interrupts.ll
Index: llvm/test/CodeGen/AVR/interrupts.ll
===================================================================
--- llvm/test/CodeGen/AVR/interrupts.ll
+++ llvm/test/CodeGen/AVR/interrupts.ll
@@ -7,7 +7,7 @@
; CHECK-NEXT: push r1
; CHECK-NEXT: in r0, 63
; CHECK-NEXT: push r0
-; CHECK: clr r0
+; CHECK: clr r1
; CHECK: pop r0
; CHECK-NEXT: out 63, r0
; CHECK-NEXT: pop r1
@@ -23,7 +23,7 @@
; CHECK-NEXT: push r1
; CHECK-NEXT: in r0, 63
; CHECK-NEXT: push r0
-; CHECK: clr r0
+; CHECK: clr r1
; CHECK: pop r0
; CHECK-NEXT: out 63, r0
; CHECK-NEXT: pop r1
@@ -39,7 +39,7 @@
; CHECK-NEXT: push r1
; CHECK-NEXT: in r0, 63
; CHECK-NEXT: push r0
-; CHECK: clr r0
+; CHECK: clr r1
; CHECK: pop r0
; CHECK-NEXT: out 63, r0
; CHECK-NEXT: pop r1
@@ -55,7 +55,7 @@
; CHECK-NEXT: push r1
; CHECK-NEXT: in r0, 63
; CHECK-NEXT: push r0
-; CHECK: clr r0
+; CHECK: clr r1
; CHECK: pop r0
; CHECK-NEXT: out 63, r0
; CHECK-NEXT: pop r1
@@ -71,7 +71,7 @@
; CHECK-NEXT: push r1
; CHECK-NEXT: in r0, 63
; CHECK-NEXT: push r0
-; CHECK: clr r0
+; CHECK: clr r1
; CHECK: push r28
; CHECK-NEXT: push r29
; CHECK-NEXT: in r28, 61
Index: llvm/lib/Target/AVR/AVRFrameLowering.cpp
===================================================================
--- llvm/lib/Target/AVR/AVRFrameLowering.cpp
+++ llvm/lib/Target/AVR/AVRFrameLowering.cpp
@@ -79,9 +79,9 @@
.addReg(AVR::R0, RegState::Kill)
.setMIFlag(MachineInstr::FrameSetup);
BuildMI(MBB, MBBI, DL, TII.get(AVR::EORRdRr))
- .addReg(AVR::R0, RegState::Define)
- .addReg(AVR::R0, RegState::Kill)
- .addReg(AVR::R0, RegState::Kill)
+ .addReg(AVR::R1, RegState::Define)
+ .addReg(AVR::R1, RegState::Kill)
+ .addReg(AVR::R1, RegState::Kill)
.setMIFlag(MachineInstr::FrameSetup);
}
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