[PATCH] D98587: [X86] Optimize vXi8 MULHS on targets where we can't sign_extend to the next register size.

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon accepted this revision.
RKSimon added a comment.
This revision is now accepted and ready to land.

LGTM - those sextintreg issues shouldn't block this



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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:27559
 
   // Bitcast back to VT and then pack all the even elements from Lo and Hi.
   return DAG.getNode(X86ISD::PACKUS, dl, VT, RLo, RHi);
----------------
We don't do a bitcast here anymore - its all done by the PACKUS


Repository:
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https://reviews.llvm.org/D98587