[llvm] 5c85c37 - [ValueTracking] Add tests for non equal shifts (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 26 12:21:17 PDT 2021
Author: Nikita Popov
Date: 2021-03-26T20:21:05+01:00
New Revision: 5c85c37c87d6c79bf2ee29c3c25456133861333e
URL: https://github.com/llvm/llvm-project/commit/5c85c37c87d6c79bf2ee29c3c25456133861333e
DIFF: https://github.com/llvm/llvm-project/commit/5c85c37c87d6c79bf2ee29c3c25456133861333e.diff
LOG: [ValueTracking] Add tests for non equal shifts (NFC)
Added:
Modified:
llvm/test/Analysis/ValueTracking/known-non-equal.ll
Removed:
################################################################################
diff --git a/llvm/test/Analysis/ValueTracking/known-non-equal.ll b/llvm/test/Analysis/ValueTracking/known-non-equal.ll
index ec2db64ab4ba..552e5d1ecc3e 100644
--- a/llvm/test/Analysis/ValueTracking/known-non-equal.ll
+++ b/llvm/test/Analysis/ValueTracking/known-non-equal.ll
@@ -343,4 +343,164 @@ exit:
ret i1 %cmp
}
+define i1 @shl_nuw(i16 %x) {
+; CHECK-LABEL: @shl_nuw(
+; CHECK-NEXT: [[NZ:%.*]] = or i16 [[X:%.*]], 2
+; CHECK-NEXT: [[MUL:%.*]] = shl nuw i16 [[NZ]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[NZ]], [[MUL]]
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %nz = or i16 %x, 2
+ %mul = shl nuw i16 %nz, 1
+ %cmp = icmp eq i16 %nz, %mul
+ ret i1 %cmp
+}
+
+define i1 @shl_nsw(i16 %x) {
+; CHECK-LABEL: @shl_nsw(
+; CHECK-NEXT: [[NZ:%.*]] = or i16 [[X:%.*]], 2
+; CHECK-NEXT: [[MUL:%.*]] = shl nsw i16 [[NZ]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[NZ]], [[MUL]]
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %nz = or i16 %x, 2
+ %mul = shl nsw i16 %nz, 1
+ %cmp = icmp eq i16 %nz, %mul
+ ret i1 %cmp
+}
+
+define i1 @shl_may_wrap(i16 %x) {
+; CHECK-LABEL: @shl_may_wrap(
+; CHECK-NEXT: [[NZ:%.*]] = or i16 [[X:%.*]], 2
+; CHECK-NEXT: [[MUL:%.*]] = shl i16 [[NZ]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[NZ]], [[MUL]]
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %nz = or i16 %x, 2
+ %mul = shl i16 %nz, 1
+ %cmp = icmp eq i16 %nz, %mul
+ ret i1 %cmp
+}
+
+define i1 @shl_shift_may_be_zero(i16 %x, i16 %shift) {
+; CHECK-LABEL: @shl_shift_may_be_zero(
+; CHECK-NEXT: [[NZ:%.*]] = or i16 [[X:%.*]], 2
+; CHECK-NEXT: [[MUL:%.*]] = shl nuw i16 [[NZ]], [[SHIFT:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[NZ]], [[MUL]]
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %nz = or i16 %x, 2
+ %mul = shl nuw i16 %nz, %shift
+ %cmp = icmp eq i16 %nz, %mul
+ ret i1 %cmp
+}
+
+define i1 @shl_op_may_be_zero(i16 %x) {
+; CHECK-LABEL: @shl_op_may_be_zero(
+; CHECK-NEXT: [[MUL:%.*]] = shl nuw i16 [[X:%.*]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[X]], [[MUL]]
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %mul = shl nuw i16 %x, 1
+ %cmp = icmp eq i16 %x, %mul
+ ret i1 %cmp
+}
+
+; The additional muls in these tests are necessary to actually
+; test the isKnownNonEqual() code, rather than InstSimplify's own
+; comparison folding.
+
+define i1 @shl_shl_nuw(i8 %B, i8 %shift) {
+; CHECK-LABEL: @shl_shl_nuw(
+; CHECK-NEXT: [[A:%.*]] = add i8 [[B:%.*]], 1
+; CHECK-NEXT: [[A_OP:%.*]] = shl nuw i8 [[A]], [[SHIFT:%.*]]
+; CHECK-NEXT: [[B_OP:%.*]] = shl nuw i8 [[B]], [[SHIFT]]
+; CHECK-NEXT: [[A_OP2:%.*]] = mul nuw i8 [[A_OP]], 3
+; CHECK-NEXT: [[B_OP2:%.*]] = mul nuw i8 [[B_OP]], 3
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A_OP2]], [[B_OP2]]
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %A = add i8 %B, 1
+ %A.op = shl nuw i8 %A, %shift
+ %B.op = shl nuw i8 %B, %shift
+ %A.op2 = mul nuw i8 %A.op, 3
+ %B.op2 = mul nuw i8 %B.op, 3
+ %cmp = icmp eq i8 %A.op2, %B.op2
+ ret i1 %cmp
+}
+
+define i1 @shl_shl_nsw(i8 %B, i8 %shift) {
+; CHECK-LABEL: @shl_shl_nsw(
+; CHECK-NEXT: [[A:%.*]] = add i8 [[B:%.*]], 1
+; CHECK-NEXT: [[A_OP:%.*]] = shl nsw i8 [[A]], [[SHIFT:%.*]]
+; CHECK-NEXT: [[B_OP:%.*]] = shl nsw i8 [[B]], [[SHIFT]]
+; CHECK-NEXT: [[A_OP2:%.*]] = mul nuw i8 [[A_OP]], 3
+; CHECK-NEXT: [[B_OP2:%.*]] = mul nuw i8 [[B_OP]], 3
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A_OP2]], [[B_OP2]]
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %A = add i8 %B, 1
+ %A.op = shl nsw i8 %A, %shift
+ %B.op = shl nsw i8 %B, %shift
+ %A.op2 = mul nuw i8 %A.op, 3
+ %B.op2 = mul nuw i8 %B.op, 3
+ %cmp = icmp eq i8 %A.op2, %B.op2
+ ret i1 %cmp
+}
+
+define i1 @shl_shl_may_wrap(i8 %B, i8 %shift) {
+; CHECK-LABEL: @shl_shl_may_wrap(
+; CHECK-NEXT: [[A:%.*]] = add i8 [[B:%.*]], 1
+; CHECK-NEXT: [[A_OP:%.*]] = shl i8 [[A]], [[SHIFT:%.*]]
+; CHECK-NEXT: [[B_OP:%.*]] = shl nsw i8 [[B]], [[SHIFT]]
+; CHECK-NEXT: [[A_OP2:%.*]] = mul nuw i8 [[A_OP]], 3
+; CHECK-NEXT: [[B_OP2:%.*]] = mul nuw i8 [[B_OP]], 3
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A_OP2]], [[B_OP2]]
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %A = add i8 %B, 1
+ %A.op = shl i8 %A, %shift
+ %B.op = shl nsw i8 %B, %shift
+ %A.op2 = mul nuw i8 %A.op, 3
+ %B.op2 = mul nuw i8 %B.op, 3
+ %cmp = icmp eq i8 %A.op2, %B.op2
+ ret i1 %cmp
+}
+
+define i1 @shl_shl_mixed_wrap(i8 %B, i8 %shift) {
+; CHECK-LABEL: @shl_shl_mixed_wrap(
+; CHECK-NEXT: [[A:%.*]] = add i8 [[B:%.*]], 1
+; CHECK-NEXT: [[A_OP:%.*]] = shl nuw i8 [[A]], [[SHIFT:%.*]]
+; CHECK-NEXT: [[B_OP:%.*]] = shl nsw i8 [[B]], [[SHIFT]]
+; CHECK-NEXT: [[A_OP2:%.*]] = mul nuw i8 [[A_OP]], 3
+; CHECK-NEXT: [[B_OP2:%.*]] = mul nuw i8 [[B_OP]], 3
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A_OP2]], [[B_OP2]]
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %A = add i8 %B, 1
+ %A.op = shl nuw i8 %A, %shift
+ %B.op = shl nsw i8 %B, %shift
+ %A.op2 = mul nuw i8 %A.op, 3
+ %B.op2 = mul nuw i8 %B.op, 3
+ %cmp = icmp eq i8 %A.op2, %B.op2
+ ret i1 %cmp
+}
+
+define i1 @shl_shl_may_be_equal(i8 %A, i8 %B, i8 %shift) {
+; CHECK-LABEL: @shl_shl_may_be_equal(
+; CHECK-NEXT: [[A_OP:%.*]] = shl nuw i8 [[A:%.*]], [[SHIFT:%.*]]
+; CHECK-NEXT: [[B_OP:%.*]] = shl nuw i8 [[B:%.*]], [[SHIFT]]
+; CHECK-NEXT: [[A_OP2:%.*]] = mul nuw i8 [[A_OP]], 3
+; CHECK-NEXT: [[B_OP2:%.*]] = mul nuw i8 [[B_OP]], 3
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A_OP2]], [[B_OP2]]
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %A.op = shl nuw i8 %A, %shift
+ %B.op = shl nuw i8 %B, %shift
+ %A.op2 = mul nuw i8 %A.op, 3
+ %B.op2 = mul nuw i8 %B.op, 3
+ %cmp = icmp eq i8 %A.op2, %B.op2
+ ret i1 %cmp
+}
+
!0 = !{ i8 1, i8 5 }
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