[PATCH] D98920: [RISCV] Add constraint for rvv indexed loads.

Zakk Chen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Mar 26 07:24:11 PDT 2021


This revision was automatically updated to reflect the committed changes.
Closed by commit rG9049cf77e394: [RISCV] Add constraint for RVV indexed loads. (authored by khchen).

Changed prior to commit:
  https://reviews.llvm.org/D98920?vs=332661&id=333550#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98920/new/

https://reviews.llvm.org/D98920

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
  llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vloxei-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vloxei-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vluxei-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vluxei-rv64.ll

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