[PATCH] D99412: [AArch64][SVEIntrinsicOpts] Optimize tbl+dup into dup+extractelement

[JunMa via Phabricator via llvm-commits]

junparser created this revision.
junparser added reviewers: david-arm, sdesmalen, paulwalker-arm, peterwaller-arm, joechrisellis.
Herald added subscribers: hiraditya, kristof.beyls, tschuett.
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According to D99324 <https://reviews.llvm.org/D99324>, this patch try to convert pattern sve_tbl(vec, sve_dup_x(idx)) to sve_dup_x(extractelement(vec, idx)) which simplify lowering and isel in later phase.  Try to solve the problem for both ACLE and auto-vectorisation.

TestPlan: check-llvm


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D99412

Files:
  llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp
  llvm/test/CodeGen/AArch64/sve-tbl-dupx.ll

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