[llvm] 5a18c57 - [RISCV] Don't call CheckAndMask from selectZExti32.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2021-03-25T22:07:41-07:00
New Revision: 5a18c576c45cba4d90a492e3162e547e04f060df

URL: https://github.com/llvm/llvm-project/commit/5a18c576c45cba4d90a492e3162e547e04f060df
DIFF: https://github.com/llvm/llvm-project/commit/5a18c576c45cba4d90a492e3162e547e04f060df.diff

LOG: [RISCV] Don't call CheckAndMask from selectZExti32.

Now that targetShrinkDemandedConstant preserves 0xffffffff masks we
shouldn't need to call computeKnownBits here.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
index 1e7516e4d729..d1f4cc29f569 100644
--- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
@@ -1128,7 +1128,7 @@ bool RISCVDAGToDAGISel::selectSExti32(SDValue N, SDValue &Val) {
 bool RISCVDAGToDAGISel::selectZExti32(SDValue N, SDValue &Val) {
   if (N.getOpcode() == ISD::AND) {
     auto *C = dyn_cast<ConstantSDNode>(N.getOperand(1));
-    if (C && CheckAndMask(N.getOperand(0), C, UINT64_C(0xFFFFFFFF))) {
+    if (C && C->getZExtValue() == UINT64_C(0xFFFFFFFF)) {
       Val = N.getOperand(0);
       return true;
     }