[llvm] 5797fea - [RISCV] Reorder checks in RISCVTTIImpl::getGatherScatterOpCost to avoid calling getMinRVVVectorSizeInBits() when V extension is not enabled.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 25 14:22:11 PDT 2021
Author: Craig Topper
Date: 2021-03-25T14:20:47-07:00
New Revision: 5797feaa55bceda38ed797de7ad90ecd6d2ee222
URL: https://github.com/llvm/llvm-project/commit/5797feaa55bceda38ed797de7ad90ecd6d2ee222
DIFF: https://github.com/llvm/llvm-project/commit/5797feaa55bceda38ed797de7ad90ecd6d2ee222.diff
LOG: [RISCV] Reorder checks in RISCVTTIImpl::getGatherScatterOpCost to avoid calling getMinRVVVectorSizeInBits() when V extension is not enabled.
getMinRVVVectorSizeInBits() asserts if the V extension isn't
enabled. So check that gather/scatter is legal first since it
already contains a check for V extension being enabled. It
also already checks getMinRVVVectorSizeInBits for fixed length
vectors so we don't need a check in getGatherScatterOpCost.
Added:
Modified:
llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
llvm/test/Analysis/CostModel/RISCV/fixed-vector-gather.ll
llvm/test/Analysis/CostModel/RISCV/fixed-vector-scatter.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index ab80b18d12c2..f1c6d5630c83 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -148,11 +148,6 @@ unsigned RISCVTTIImpl::getGatherScatterOpCost(
return BaseT::getGatherScatterOpCost(Opcode, DataTy, Ptr, VariableMask,
Alignment, CostKind, I);
- // FIXME: Only supporting fixed vectors for now.
- if (!isa<FixedVectorType>(DataTy) || ST->getMinRVVVectorSizeInBits() == 0)
- return BaseT::getGatherScatterOpCost(Opcode, DataTy, Ptr, VariableMask,
- Alignment, CostKind, I);
-
if ((Opcode == Instruction::Load &&
!isLegalMaskedGather(DataTy, Align(Alignment))) ||
(Opcode == Instruction::Store &&
@@ -160,6 +155,11 @@ unsigned RISCVTTIImpl::getGatherScatterOpCost(
return BaseT::getGatherScatterOpCost(Opcode, DataTy, Ptr, VariableMask,
Alignment, CostKind, I);
+ // FIXME: Only supporting fixed vectors for now.
+ if (!isa<FixedVectorType>(DataTy))
+ return BaseT::getGatherScatterOpCost(Opcode, DataTy, Ptr, VariableMask,
+ Alignment, CostKind, I);
+
auto *VTy = cast<FixedVectorType>(DataTy);
unsigned NumLoads = VTy->getNumElements();
unsigned MemOpCost =
diff --git a/llvm/test/Analysis/CostModel/RISCV/fixed-vector-gather.ll b/llvm/test/Analysis/CostModel/RISCV/fixed-vector-gather.ll
index a456c95313c3..5de1f3eb97d8 100644
--- a/llvm/test/Analysis/CostModel/RISCV/fixed-vector-gather.ll
+++ b/llvm/test/Analysis/CostModel/RISCV/fixed-vector-gather.ll
@@ -1,5 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
; RUN: opt -cost-model -analyze -mtriple=riscv64 -mattr=+experimental-v,+f,+d,+experimental-zfh -riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=1 < %s 2>%t | FileCheck %s
+; Sanity check that we don't crash querying costs when vectors are not enabled.
+; RUN: opt -cost-model -analyze -mtriple=riscv64
define i32 @masked_gather() {
; CHECK-LABEL: 'masked_gather'
diff --git a/llvm/test/Analysis/CostModel/RISCV/fixed-vector-scatter.ll b/llvm/test/Analysis/CostModel/RISCV/fixed-vector-scatter.ll
index 23f0fbd24afb..90323e26e8fa 100644
--- a/llvm/test/Analysis/CostModel/RISCV/fixed-vector-scatter.ll
+++ b/llvm/test/Analysis/CostModel/RISCV/fixed-vector-scatter.ll
@@ -1,5 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
; RUN: opt -cost-model -analyze -mtriple=riscv64 -mattr=+experimental-v,+f,+d,+experimental-zfh -riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=1 < %s 2>%t | FileCheck %s
+; Sanity check that we don't crash querying costs when vectors are not enabled.
+; RUN: opt -cost-model -analyze -mtriple=riscv64
define i32 @masked_scatter() {
; CHECK-LABEL: 'masked_scatter'
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