[PATCH] D99328: [SLP] Fix crash in reduction for integer min/max
Yevgeny Rouban via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 25 08:03:38 PDT 2021
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGf7ef26ef0b29: [SLP] Fix crash in reduction for integer min/max (authored by yrouban).
Changed prior to commit:
https://reviews.llvm.org/D99328?vs=333264&id=333306#toc
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D99328/new/
https://reviews.llvm.org/D99328
Files:
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
llvm/test/Transforms/SLPVectorizer/slp-umax-rdx-matcher-crash.ll
Index: llvm/test/Transforms/SLPVectorizer/slp-umax-rdx-matcher-crash.ll
===================================================================
--- llvm/test/Transforms/SLPVectorizer/slp-umax-rdx-matcher-crash.ll
+++ llvm/test/Transforms/SLPVectorizer/slp-umax-rdx-matcher-crash.ll
@@ -1,6 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -slp-vectorizer -S < %s 2>&1 | FileCheck %s
-; REQUIRES: asserts
+; RUN: opt -slp-vectorizer -S < %s | FileCheck %s
; Given LLVM IR caused associative reduction matching routine crash in SLP.
; The routines begins with select as integer Umax reduction kind
@@ -37,3 +36,34 @@
declare i8 @llvm.umax.i8(i8, i8)
+declare i32 @llvm.smin.i32(i32, i32)
+declare i32 @llvm.umin.i32(i32, i32)
+
+; Given LLVM IR caused crash in SLP.
+define void @test2() {
+; CHECK-LABEL: @test2(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.smin.v4i32(<4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>)
+; CHECK-NEXT: [[TMP1:%.*]] = sub nsw <4 x i32> undef, [[TMP0]]
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.vector.reduce.umin.v4i32(<4 x i32> [[TMP1]])
+; CHECK-NEXT: [[OP_EXTRA:%.*]] = icmp ult i32 [[TMP2]], 77
+; CHECK-NEXT: [[OP_EXTRA1:%.*]] = select i1 [[OP_EXTRA]], i32 [[TMP2]], i32 77
+; CHECK-NEXT: [[E:%.*]] = icmp ugt i32 [[OP_EXTRA1]], 1
+; CHECK-NEXT: ret void
+;
+entry:
+ %smin0 = call i32 @llvm.smin.i32(i32 undef, i32 0)
+ %smin1 = call i32 @llvm.smin.i32(i32 undef, i32 1)
+ %smin2 = call i32 @llvm.smin.i32(i32 undef, i32 2)
+ %smin3 = call i32 @llvm.smin.i32(i32 undef, i32 3)
+ %a = sub nsw i32 undef, %smin0
+ %b = sub nsw i32 undef, %smin1
+ %c = sub nsw i32 undef, %smin2
+ %d = sub nsw i32 undef, %smin3
+ %umin0 = call i32 @llvm.umin.i32(i32 %d, i32 %c)
+ %umin1 = call i32 @llvm.umin.i32(i32 %umin0, i32 %b)
+ %umin2 = call i32 @llvm.umin.i32(i32 %umin1, i32 %a)
+ %umin3 = call i32 @llvm.umin.i32(i32 %umin2, i32 77)
+ %e = icmp ugt i32 %umin3, 1
+ ret void
+}
Index: llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
===================================================================
--- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -6629,10 +6629,9 @@
Value *RHS, const Twine &Name, Instruction *I) {
Value *Op = createOp(Builder, RdxKind, LHS, RHS, Name);
if (RecurrenceDescriptor::isIntMinMaxRecurrenceKind(RdxKind)) {
- if (auto *Sel = dyn_cast<SelectInst>(Op)) {
- propagateIRFlags(Sel->getCondition(),
- cast<SelectInst>(I)->getCondition());
- }
+ if (auto *Sel = dyn_cast<SelectInst>(Op))
+ if (auto *SelI = dyn_cast<SelectInst>(I))
+ propagateIRFlags(Sel->getCondition(), SelI->getCondition());
}
propagateIRFlags(Op, I);
return Op;
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