[llvm] 1818dc3 - [AArch64][GlobalISel] Mark G_SBFX/G_UBFX as legal for s32 and s64
Jessica Paquette via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 24 11:10:21 PDT 2021
Author: Jessica Paquette
Date: 2021-03-24T11:08:41-07:00
New Revision: 1818dc394f3172a44df07adf754110d7ecca5e13
URL: https://github.com/llvm/llvm-project/commit/1818dc394f3172a44df07adf754110d7ecca5e13
DIFF: https://github.com/llvm/llvm-project/commit/1818dc394f3172a44df07adf754110d7ecca5e13.diff
LOG: [AArch64][GlobalISel] Mark G_SBFX/G_UBFX as legal for s32 and s64
This isn't perfect, since we should also verify that these only use constants.
Differential Revision: https://reviews.llvm.org/D99219
Added:
llvm/test/CodeGen/AArch64/GlobalISel/legalize-sbfx.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-ubfx.mir
Modified:
llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
Removed:
################################################################################
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
index 942456b634dc..8098fba4dc5a 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -702,6 +702,7 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
getActionDefinitionsBuilder({G_FSHL, G_FSHR}).lower();
+ getActionDefinitionsBuilder({G_SBFX, G_UBFX}).legalFor({s32, s64});
computeTables();
verify(*ST.getInstrInfo());
}
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-sbfx.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-sbfx.mir
new file mode 100644
index 000000000000..ccf7b1b92612
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-sbfx.mir
@@ -0,0 +1,37 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple aarch64 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
+...
+---
+name: s32
+body: |
+ bb.0.entry:
+ liveins: $w0
+ ; CHECK-LABEL: name: s32
+ ; CHECK: %copy:_(s32) = COPY $w0
+ ; CHECK: %lsb:_(s32) = G_CONSTANT i32 1
+ ; CHECK: %width:_(s32) = G_CONSTANT i32 2
+ ; CHECK: %sbfx:_(s32) = G_SBFX %copy, %lsb, %width
+ ; CHECK: $w0 = COPY %sbfx(s32)
+ %copy:_(s32) = COPY $w0
+ %lsb:_(s32) = G_CONSTANT i32 1
+ %width:_(s32) = G_CONSTANT i32 2
+ %sbfx:_(s32) = G_SBFX %copy(s32), %lsb, %width
+ $w0 = COPY %sbfx(s32)
+...
+---
+name: s64
+body: |
+ bb.0.entry:
+ liveins: $x0
+ ; CHECK-LABEL: name: s64
+ ; CHECK: %copy:_(s64) = COPY $x0
+ ; CHECK: %lsb:_(s64) = G_CONSTANT i64 1
+ ; CHECK: %width:_(s64) = G_CONSTANT i64 2
+ ; CHECK: %sbfx:_(s64) = G_SBFX %copy, %lsb, %width
+ ; CHECK: $x0 = COPY %sbfx(s64)
+ %copy:_(s64) = COPY $x0
+ %lsb:_(s64) = G_CONSTANT i64 1
+ %width:_(s64) = G_CONSTANT i64 2
+ %sbfx:_(s64) = G_SBFX %copy(s64), %lsb, %width
+ $x0 = COPY %sbfx(s64)
+...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-ubfx.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-ubfx.mir
new file mode 100644
index 000000000000..0b32bf5923bd
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-ubfx.mir
@@ -0,0 +1,37 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple aarch64 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
+...
+---
+name: s32
+body: |
+ bb.0.entry:
+ liveins: $w0
+ ; CHECK-LABEL: name: s32
+ ; CHECK: %copy:_(s32) = COPY $w0
+ ; CHECK: %lsb:_(s32) = G_CONSTANT i32 1
+ ; CHECK: %width:_(s32) = G_CONSTANT i32 2
+ ; CHECK: %ubfx:_(s32) = G_UBFX %copy, %lsb, %width
+ ; CHECK: $w0 = COPY %ubfx(s32)
+ %copy:_(s32) = COPY $w0
+ %lsb:_(s32) = G_CONSTANT i32 1
+ %width:_(s32) = G_CONSTANT i32 2
+ %ubfx:_(s32) = G_UBFX %copy(s32), %lsb, %width
+ $w0 = COPY %ubfx(s32)
+...
+---
+name: s64
+body: |
+ bb.0.entry:
+ liveins: $x0
+ ; CHECK-LABEL: name: s64
+ ; CHECK: %copy:_(s64) = COPY $x0
+ ; CHECK: %lsb:_(s64) = G_CONSTANT i64 1
+ ; CHECK: %width:_(s64) = G_CONSTANT i64 2
+ ; CHECK: %ubfx:_(s64) = G_UBFX %copy, %lsb, %width
+ ; CHECK: $x0 = COPY %ubfx(s64)
+ %copy:_(s64) = COPY $x0
+ %lsb:_(s64) = G_CONSTANT i64 1
+ %width:_(s64) = G_CONSTANT i64 2
+ %ubfx:_(s64) = G_UBFX %copy(s64), %lsb, %width
+ $x0 = COPY %ubfx(s64)
+...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
index e1538a2756b3..a153339f6b6b 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
@@ -674,7 +674,13 @@
# DEBUG-NEXT: G_VECREDUCE_UMIN (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
-
+# DEBUG-NEXT: G_SBFX (opcode {{[0-9]+}}): 1 type index, 0 imm indices
+# DEBUG-NEXT: .. the first uncovered type index: 1, OK
+# DEBUG-NEXT: .. the first uncovered imm index: 0, OK
+# DEBUG-NEXT: G_UBFX (opcode {{[0-9]+}}): 1 type index, 0 imm indices
+# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
+# DEBUG-NEXT: .. the first uncovered type index: 1, OK
+# DEBUG-NEXT: .. the first uncovered imm index: 0, OK
# CHECK-NOT: ill-defined
---
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