[llvm] 69b71d2 - [X86][AVX] Cleanup gather_v8i32_v8i32 special test case
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 24 04:14:53 PDT 2021
Author: Simon Pilgrim
Date: 2021-03-24T11:14:38Z
New Revision: 69b71d245f27ff2538043710bb4207d2d1748099
URL: https://github.com/llvm/llvm-project/commit/69b71d245f27ff2538043710bb4207d2d1748099
DIFF: https://github.com/llvm/llvm-project/commit/69b71d245f27ff2538043710bb4207d2d1748099.diff
LOG: [X86][AVX] Cleanup gather_v8i32_v8i32 special test case
Cleanup the gather_v8i32_v8i32 IR to more closely match how the middle-end will optimise the vector geps (exposing more splats).
This helps the gather scalarization case a lot, but shows a missed opportunity for AVX512 gathers to recognise uniform-constant indices.
And none of the cases realise that some of the gathers are really blended broadcasts....
Added:
Modified:
llvm/test/CodeGen/X86/masked_gather.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/masked_gather.ll b/llvm/test/CodeGen/X86/masked_gather.ll
index bf4baf6d4bd6..3bb06d7c731f 100644
--- a/llvm/test/CodeGen/X86/masked_gather.ll
+++ b/llvm/test/CodeGen/X86/masked_gather.ll
@@ -1025,11 +1025,6 @@ define <8 x i32> @gather_v8i32_v8i32(<8 x i32> %trigger) {
; SSE: # %bb.0:
; SSE-NEXT: movdqa %xmm1, %xmm3
; SSE-NEXT: movdqa %xmm0, %xmm2
-; SSE-NEXT: movl $c, %eax
-; SSE-NEXT: movq %rax, %xmm0
-; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm0[0,1,0,1]
-; SSE-NEXT: movdqa {{.*#+}} xmm5 = [12,12]
-; SSE-NEXT: paddq %xmm4, %xmm5
; SSE-NEXT: pxor %xmm0, %xmm0
; SSE-NEXT: pcmpeqd %xmm0, %xmm1
; SSE-NEXT: pcmpeqd %xmm2, %xmm0
@@ -1039,7 +1034,6 @@ define <8 x i32> @gather_v8i32_v8i32(<8 x i32> %trigger) {
; SSE-NEXT: testb $1, %al
; SSE-NEXT: je .LBB4_1
; SSE-NEXT: # %bb.2: # %cond.load
-; SSE-NEXT: movq %xmm5, %rcx
; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; SSE-NEXT: testb $2, %al
; SSE-NEXT: jne .LBB4_4
@@ -1049,8 +1043,7 @@ define <8 x i32> @gather_v8i32_v8i32(<8 x i32> %trigger) {
; SSE-NEXT: testb $2, %al
; SSE-NEXT: je .LBB4_5
; SSE-NEXT: .LBB4_4: # %cond.load1
-; SSE-NEXT: pextrq $1, %xmm5, %rcx
-; SSE-NEXT: pinsrd $1, (%rcx), %xmm0
+; SSE-NEXT: pinsrd $1, c+{{.*}}(%rip), %xmm0
; SSE-NEXT: .LBB4_5: # %else2
; SSE-NEXT: testb $4, %al
; SSE-NEXT: jne .LBB4_6
@@ -1061,19 +1054,16 @@ define <8 x i32> @gather_v8i32_v8i32(<8 x i32> %trigger) {
; SSE-NEXT: testb $16, %al
; SSE-NEXT: je .LBB4_10
; SSE-NEXT: .LBB4_11: # %cond.load10
-; SSE-NEXT: movq %xmm5, %rcx
-; SSE-NEXT: pinsrd $0, (%rcx), %xmm1
+; SSE-NEXT: pinsrd $0, c+{{.*}}(%rip), %xmm1
; SSE-NEXT: testb $32, %al
; SSE-NEXT: jne .LBB4_13
; SSE-NEXT: jmp .LBB4_14
; SSE-NEXT: .LBB4_6: # %cond.load4
-; SSE-NEXT: movq %xmm5, %rcx
-; SSE-NEXT: pinsrd $2, (%rcx), %xmm0
+; SSE-NEXT: pinsrd $2, c+{{.*}}(%rip), %xmm0
; SSE-NEXT: testb $8, %al
; SSE-NEXT: je .LBB4_9
; SSE-NEXT: .LBB4_8: # %cond.load7
-; SSE-NEXT: pextrq $1, %xmm5, %rcx
-; SSE-NEXT: pinsrd $3, (%rcx), %xmm0
+; SSE-NEXT: pinsrd $3, c+{{.*}}(%rip), %xmm0
; SSE-NEXT: testb $16, %al
; SSE-NEXT: jne .LBB4_11
; SSE-NEXT: .LBB4_10:
@@ -1081,8 +1071,7 @@ define <8 x i32> @gather_v8i32_v8i32(<8 x i32> %trigger) {
; SSE-NEXT: testb $32, %al
; SSE-NEXT: je .LBB4_14
; SSE-NEXT: .LBB4_13: # %cond.load13
-; SSE-NEXT: pextrq $1, %xmm5, %rcx
-; SSE-NEXT: pinsrd $1, (%rcx), %xmm1
+; SSE-NEXT: pinsrd $1, c+{{.*}}(%rip), %xmm1
; SSE-NEXT: .LBB4_14: # %else14
; SSE-NEXT: testb $64, %al
; SSE-NEXT: jne .LBB4_15
@@ -1090,97 +1079,85 @@ define <8 x i32> @gather_v8i32_v8i32(<8 x i32> %trigger) {
; SSE-NEXT: testb $-128, %al
; SSE-NEXT: je .LBB4_18
; SSE-NEXT: .LBB4_17: # %cond.load19
-; SSE-NEXT: pextrq $1, %xmm5, %rax
-; SSE-NEXT: pinsrd $3, (%rax), %xmm1
+; SSE-NEXT: pinsrd $3, c+{{.*}}(%rip), %xmm1
; SSE-NEXT: .LBB4_18: # %else20
-; SSE-NEXT: pxor %xmm5, %xmm5
-; SSE-NEXT: paddq {{.*}}(%rip), %xmm4
-; SSE-NEXT: movdqa %xmm2, %xmm6
-; SSE-NEXT: pcmpeqd %xmm5, %xmm6
-; SSE-NEXT: pcmpeqd %xmm3, %xmm5
-; SSE-NEXT: packssdw %xmm5, %xmm6
-; SSE-NEXT: packsswb %xmm6, %xmm6
-; SSE-NEXT: pmovmskb %xmm6, %eax
+; SSE-NEXT: pxor %xmm4, %xmm4
+; SSE-NEXT: movdqa %xmm2, %xmm5
+; SSE-NEXT: pcmpeqd %xmm4, %xmm5
+; SSE-NEXT: pcmpeqd %xmm3, %xmm4
+; SSE-NEXT: packssdw %xmm4, %xmm5
+; SSE-NEXT: packsswb %xmm5, %xmm5
+; SSE-NEXT: pmovmskb %xmm5, %eax
; SSE-NEXT: testb $1, %al
; SSE-NEXT: je .LBB4_19
; SSE-NEXT: # %bb.20: # %cond.load23
-; SSE-NEXT: movq %xmm4, %rcx
-; SSE-NEXT: movd {{.*#+}} xmm5 = mem[0],zero,zero,zero
+; SSE-NEXT: movd {{.*#+}} xmm4 = mem[0],zero,zero,zero
; SSE-NEXT: testb $2, %al
; SSE-NEXT: jne .LBB4_22
; SSE-NEXT: jmp .LBB4_23
; SSE-NEXT: .LBB4_15: # %cond.load16
-; SSE-NEXT: movq %xmm5, %rcx
-; SSE-NEXT: pinsrd $2, (%rcx), %xmm1
+; SSE-NEXT: pinsrd $2, c+{{.*}}(%rip), %xmm1
; SSE-NEXT: testb $-128, %al
; SSE-NEXT: jne .LBB4_17
; SSE-NEXT: jmp .LBB4_18
; SSE-NEXT: .LBB4_19:
-; SSE-NEXT: # implicit-def: $xmm5
+; SSE-NEXT: # implicit-def: $xmm4
; SSE-NEXT: testb $2, %al
; SSE-NEXT: je .LBB4_23
-; SSE-NEXT: .LBB4_22: # %cond.load29
-; SSE-NEXT: pextrq $1, %xmm4, %rcx
-; SSE-NEXT: pinsrd $1, (%rcx), %xmm5
-; SSE-NEXT: .LBB4_23: # %else33
+; SSE-NEXT: .LBB4_22: # %cond.load28
+; SSE-NEXT: pinsrd $1, c+{{.*}}(%rip), %xmm4
+; SSE-NEXT: .LBB4_23: # %else31
; SSE-NEXT: testb $4, %al
; SSE-NEXT: jne .LBB4_24
-; SSE-NEXT: # %bb.25: # %else39
+; SSE-NEXT: # %bb.25: # %else36
; SSE-NEXT: testb $8, %al
; SSE-NEXT: jne .LBB4_26
-; SSE-NEXT: .LBB4_27: # %else45
+; SSE-NEXT: .LBB4_27: # %else41
; SSE-NEXT: testb $16, %al
; SSE-NEXT: je .LBB4_28
-; SSE-NEXT: .LBB4_29: # %cond.load47
-; SSE-NEXT: movq %xmm4, %rcx
-; SSE-NEXT: pinsrd $0, (%rcx), %xmm6
+; SSE-NEXT: .LBB4_29: # %cond.load43
+; SSE-NEXT: pinsrd $0, c+{{.*}}(%rip), %xmm5
; SSE-NEXT: testb $32, %al
; SSE-NEXT: jne .LBB4_31
; SSE-NEXT: jmp .LBB4_32
-; SSE-NEXT: .LBB4_24: # %cond.load35
-; SSE-NEXT: movq %xmm4, %rcx
-; SSE-NEXT: pinsrd $2, (%rcx), %xmm5
+; SSE-NEXT: .LBB4_24: # %cond.load33
+; SSE-NEXT: pinsrd $2, c+{{.*}}(%rip), %xmm4
; SSE-NEXT: testb $8, %al
; SSE-NEXT: je .LBB4_27
-; SSE-NEXT: .LBB4_26: # %cond.load41
-; SSE-NEXT: pextrq $1, %xmm4, %rcx
-; SSE-NEXT: pinsrd $3, (%rcx), %xmm5
+; SSE-NEXT: .LBB4_26: # %cond.load38
+; SSE-NEXT: pinsrd $3, c+{{.*}}(%rip), %xmm4
; SSE-NEXT: testb $16, %al
; SSE-NEXT: jne .LBB4_29
; SSE-NEXT: .LBB4_28:
-; SSE-NEXT: # implicit-def: $xmm6
+; SSE-NEXT: # implicit-def: $xmm5
; SSE-NEXT: testb $32, %al
; SSE-NEXT: je .LBB4_32
-; SSE-NEXT: .LBB4_31: # %cond.load53
-; SSE-NEXT: pextrq $1, %xmm4, %rcx
-; SSE-NEXT: pinsrd $1, (%rcx), %xmm6
-; SSE-NEXT: .LBB4_32: # %else57
+; SSE-NEXT: .LBB4_31: # %cond.load48
+; SSE-NEXT: pinsrd $1, c+{{.*}}(%rip), %xmm5
+; SSE-NEXT: .LBB4_32: # %else51
; SSE-NEXT: testb $64, %al
; SSE-NEXT: jne .LBB4_33
-; SSE-NEXT: # %bb.34: # %else63
+; SSE-NEXT: # %bb.34: # %else56
; SSE-NEXT: testb $-128, %al
; SSE-NEXT: je .LBB4_36
-; SSE-NEXT: .LBB4_35: # %cond.load65
-; SSE-NEXT: pextrq $1, %xmm4, %rax
-; SSE-NEXT: pinsrd $3, (%rax), %xmm6
-; SSE-NEXT: .LBB4_36: # %else69
-; SSE-NEXT: pxor %xmm7, %xmm7
-; SSE-NEXT: pcmpeqd %xmm7, %xmm2
-; SSE-NEXT: pcmpeqd %xmm7, %xmm3
+; SSE-NEXT: .LBB4_35: # %cond.load58
+; SSE-NEXT: pinsrd $3, c+{{.*}}(%rip), %xmm5
+; SSE-NEXT: .LBB4_36: # %else61
+; SSE-NEXT: pxor %xmm6, %xmm6
+; SSE-NEXT: pcmpeqd %xmm6, %xmm2
+; SSE-NEXT: pcmpeqd %xmm6, %xmm3
; SSE-NEXT: packssdw %xmm3, %xmm2
; SSE-NEXT: packsswb %xmm2, %xmm2
; SSE-NEXT: pmovmskb %xmm2, %eax
; SSE-NEXT: testb $1, %al
; SSE-NEXT: je .LBB4_37
-; SSE-NEXT: # %bb.38: # %cond.load72
-; SSE-NEXT: movq %xmm4, %rcx
+; SSE-NEXT: # %bb.38: # %cond.load64
; SSE-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
; SSE-NEXT: testb $2, %al
; SSE-NEXT: jne .LBB4_40
; SSE-NEXT: jmp .LBB4_41
-; SSE-NEXT: .LBB4_33: # %cond.load59
-; SSE-NEXT: movq %xmm4, %rcx
-; SSE-NEXT: pinsrd $2, (%rcx), %xmm6
+; SSE-NEXT: .LBB4_33: # %cond.load53
+; SSE-NEXT: pinsrd $2, c+{{.*}}(%rip), %xmm5
; SSE-NEXT: testb $-128, %al
; SSE-NEXT: jne .LBB4_35
; SSE-NEXT: jmp .LBB4_36
@@ -1188,322 +1165,293 @@ define <8 x i32> @gather_v8i32_v8i32(<8 x i32> %trigger) {
; SSE-NEXT: # implicit-def: $xmm2
; SSE-NEXT: testb $2, %al
; SSE-NEXT: je .LBB4_41
-; SSE-NEXT: .LBB4_40: # %cond.load78
-; SSE-NEXT: pextrq $1, %xmm4, %rcx
-; SSE-NEXT: pinsrd $1, (%rcx), %xmm2
-; SSE-NEXT: .LBB4_41: # %else82
+; SSE-NEXT: .LBB4_40: # %cond.load69
+; SSE-NEXT: pinsrd $1, c+{{.*}}(%rip), %xmm2
+; SSE-NEXT: .LBB4_41: # %else72
; SSE-NEXT: testb $4, %al
; SSE-NEXT: jne .LBB4_42
-; SSE-NEXT: # %bb.43: # %else88
+; SSE-NEXT: # %bb.43: # %else77
; SSE-NEXT: testb $8, %al
; SSE-NEXT: jne .LBB4_44
-; SSE-NEXT: .LBB4_45: # %else94
+; SSE-NEXT: .LBB4_45: # %else82
; SSE-NEXT: testb $16, %al
; SSE-NEXT: je .LBB4_46
-; SSE-NEXT: .LBB4_47: # %cond.load96
-; SSE-NEXT: movq %xmm4, %rcx
-; SSE-NEXT: pinsrd $0, (%rcx), %xmm3
+; SSE-NEXT: .LBB4_47: # %cond.load84
+; SSE-NEXT: pinsrd $0, c+{{.*}}(%rip), %xmm3
; SSE-NEXT: testb $32, %al
; SSE-NEXT: jne .LBB4_49
; SSE-NEXT: jmp .LBB4_50
-; SSE-NEXT: .LBB4_42: # %cond.load84
-; SSE-NEXT: movq %xmm4, %rcx
-; SSE-NEXT: pinsrd $2, (%rcx), %xmm2
+; SSE-NEXT: .LBB4_42: # %cond.load74
+; SSE-NEXT: pinsrd $2, c+{{.*}}(%rip), %xmm2
; SSE-NEXT: testb $8, %al
; SSE-NEXT: je .LBB4_45
-; SSE-NEXT: .LBB4_44: # %cond.load90
-; SSE-NEXT: pextrq $1, %xmm4, %rcx
-; SSE-NEXT: pinsrd $3, (%rcx), %xmm2
+; SSE-NEXT: .LBB4_44: # %cond.load79
+; SSE-NEXT: pinsrd $3, c+{{.*}}(%rip), %xmm2
; SSE-NEXT: testb $16, %al
; SSE-NEXT: jne .LBB4_47
; SSE-NEXT: .LBB4_46:
; SSE-NEXT: # implicit-def: $xmm3
; SSE-NEXT: testb $32, %al
; SSE-NEXT: je .LBB4_50
-; SSE-NEXT: .LBB4_49: # %cond.load102
-; SSE-NEXT: pextrq $1, %xmm4, %rcx
-; SSE-NEXT: pinsrd $1, (%rcx), %xmm3
-; SSE-NEXT: .LBB4_50: # %else106
+; SSE-NEXT: .LBB4_49: # %cond.load89
+; SSE-NEXT: pinsrd $1, c+{{.*}}(%rip), %xmm3
+; SSE-NEXT: .LBB4_50: # %else92
; SSE-NEXT: testb $64, %al
; SSE-NEXT: je .LBB4_52
-; SSE-NEXT: # %bb.51: # %cond.load108
-; SSE-NEXT: movq %xmm4, %rcx
-; SSE-NEXT: pinsrd $2, (%rcx), %xmm3
-; SSE-NEXT: .LBB4_52: # %else112
-; SSE-NEXT: paddd %xmm5, %xmm0
-; SSE-NEXT: paddd %xmm6, %xmm1
+; SSE-NEXT: # %bb.51: # %cond.load94
+; SSE-NEXT: pinsrd $2, c+{{.*}}(%rip), %xmm3
+; SSE-NEXT: .LBB4_52: # %else97
+; SSE-NEXT: paddd %xmm4, %xmm0
+; SSE-NEXT: paddd %xmm5, %xmm1
; SSE-NEXT: testb $-128, %al
; SSE-NEXT: je .LBB4_54
-; SSE-NEXT: # %bb.53: # %cond.load114
-; SSE-NEXT: pextrq $1, %xmm4, %rax
-; SSE-NEXT: pinsrd $3, (%rax), %xmm3
-; SSE-NEXT: .LBB4_54: # %else118
+; SSE-NEXT: # %bb.53: # %cond.load99
+; SSE-NEXT: pinsrd $3, c+{{.*}}(%rip), %xmm3
+; SSE-NEXT: .LBB4_54: # %else102
; SSE-NEXT: paddd %xmm3, %xmm1
; SSE-NEXT: paddd %xmm2, %xmm0
; SSE-NEXT: retq
;
; AVX1-LABEL: gather_v8i32_v8i32:
; AVX1: # %bb.0:
-; AVX1-NEXT: movl $c, %ecx
-; AVX1-NEXT: vmovq %rcx, %xmm1
-; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,1]
-; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm1, %xmm1
-; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm1, %ymm3
-; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm9
+; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX1-NEXT: vpcmpeqd %xmm1, %xmm9, %xmm4
+; AVX1-NEXT: vpcmpeqd %xmm1, %xmm2, %xmm3
; AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm1
-; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm1, %ymm1
+; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1
; AVX1-NEXT: vmovmskps %ymm1, %eax
; AVX1-NEXT: testb $1, %al
; AVX1-NEXT: # implicit-def: $ymm1
-; AVX1-NEXT: je .LBB4_2
-; AVX1-NEXT: # %bb.1: # %cond.load
-; AVX1-NEXT: vmovq %xmm3, %rdx
-; AVX1-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero
-; AVX1-NEXT: .LBB4_2: # %else
+; AVX1-NEXT: jne .LBB4_1
+; AVX1-NEXT: # %bb.2: # %else
; AVX1-NEXT: testb $2, %al
-; AVX1-NEXT: je .LBB4_4
-; AVX1-NEXT: # %bb.3: # %cond.load1
-; AVX1-NEXT: vpextrq $1, %xmm3, %rdx
-; AVX1-NEXT: vpinsrd $1, (%rdx), %xmm1, %xmm4
-; AVX1-NEXT: vblendps {{.*#+}} ymm1 = ymm4[0,1,2,3],ymm1[4,5,6,7]
+; AVX1-NEXT: jne .LBB4_3
; AVX1-NEXT: .LBB4_4: # %else2
; AVX1-NEXT: testb $4, %al
-; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4
-; AVX1-NEXT: je .LBB4_6
-; AVX1-NEXT: # %bb.5: # %cond.load4
-; AVX1-NEXT: vmovq %xmm4, %rdx
-; AVX1-NEXT: vpinsrd $2, (%rdx), %xmm1, %xmm5
-; AVX1-NEXT: vblendps {{.*#+}} ymm1 = ymm5[0,1,2,3],ymm1[4,5,6,7]
+; AVX1-NEXT: jne .LBB4_5
; AVX1-NEXT: .LBB4_6: # %else5
-; AVX1-NEXT: vmovq %rcx, %xmm5
; AVX1-NEXT: testb $8, %al
-; AVX1-NEXT: je .LBB4_8
-; AVX1-NEXT: # %bb.7: # %cond.load7
-; AVX1-NEXT: vpextrq $1, %xmm4, %rcx
-; AVX1-NEXT: vpinsrd $3, (%rcx), %xmm1, %xmm6
-; AVX1-NEXT: vblendps {{.*#+}} ymm1 = ymm6[0,1,2,3],ymm1[4,5,6,7]
+; AVX1-NEXT: jne .LBB4_7
; AVX1-NEXT: .LBB4_8: # %else8
-; AVX1-NEXT: vmovddup {{.*#+}} xmm5 = xmm5[0,0]
; AVX1-NEXT: testb $16, %al
-; AVX1-NEXT: je .LBB4_10
-; AVX1-NEXT: # %bb.9: # %cond.load10
-; AVX1-NEXT: vmovq %xmm3, %rcx
-; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm6
-; AVX1-NEXT: vpinsrd $0, (%rcx), %xmm6, %xmm6
-; AVX1-NEXT: vinsertf128 $1, %xmm6, %ymm1, %ymm1
+; AVX1-NEXT: jne .LBB4_9
; AVX1-NEXT: .LBB4_10: # %else11
; AVX1-NEXT: testb $32, %al
-; AVX1-NEXT: je .LBB4_12
-; AVX1-NEXT: # %bb.11: # %cond.load13
-; AVX1-NEXT: vpextrq $1, %xmm3, %rcx
-; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
-; AVX1-NEXT: vpinsrd $1, (%rcx), %xmm3, %xmm3
-; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1
+; AVX1-NEXT: jne .LBB4_11
; AVX1-NEXT: .LBB4_12: # %else14
-; AVX1-NEXT: vinsertf128 $1, %xmm5, %ymm5, %ymm5
; AVX1-NEXT: testb $64, %al
-; AVX1-NEXT: je .LBB4_14
-; AVX1-NEXT: # %bb.13: # %cond.load16
-; AVX1-NEXT: vmovq %xmm4, %rcx
-; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
-; AVX1-NEXT: vpinsrd $2, (%rcx), %xmm3, %xmm3
-; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1
+; AVX1-NEXT: jne .LBB4_13
; AVX1-NEXT: .LBB4_14: # %else17
; AVX1-NEXT: testb $-128, %al
; AVX1-NEXT: je .LBB4_16
-; AVX1-NEXT: # %bb.15: # %cond.load19
-; AVX1-NEXT: vpextrq $1, %xmm4, %rax
+; AVX1-NEXT: .LBB4_15: # %cond.load19
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
-; AVX1-NEXT: vpinsrd $3, (%rax), %xmm3, %xmm3
+; AVX1-NEXT: vpinsrd $3, c+{{.*}}(%rip), %xmm3, %xmm3
; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1
; AVX1-NEXT: .LBB4_16: # %else20
-; AVX1-NEXT: vextractf128 $1, %ymm5, %xmm3
-; AVX1-NEXT: vmovdqa {{.*#+}} xmm10 = [28,28]
-; AVX1-NEXT: vpaddq %xmm3, %xmm10, %xmm3
-; AVX1-NEXT: vpaddq %xmm5, %xmm10, %xmm4
-; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm4, %ymm7
-; AVX1-NEXT: vpxor %xmm4, %xmm4, %xmm4
-; AVX1-NEXT: vpcmpeqd %xmm4, %xmm9, %xmm2
-; AVX1-NEXT: vpcmpeqd %xmm4, %xmm0, %xmm4
-; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm4, %ymm2
-; AVX1-NEXT: vmovmskps %ymm2, %eax
+; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3
+; AVX1-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm4
+; AVX1-NEXT: vpcmpeqd %xmm3, %xmm0, %xmm3
+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3
+; AVX1-NEXT: vmovmskps %ymm3, %eax
; AVX1-NEXT: testb $1, %al
-; AVX1-NEXT: # implicit-def: $ymm4
-; AVX1-NEXT: je .LBB4_18
-; AVX1-NEXT: # %bb.17: # %cond.load23
-; AVX1-NEXT: vmovq %xmm7, %rcx
-; AVX1-NEXT: vmovd {{.*#+}} xmm4 = mem[0],zero,zero,zero
-; AVX1-NEXT: .LBB4_18: # %else27
+; AVX1-NEXT: # implicit-def: $ymm3
+; AVX1-NEXT: jne .LBB4_17
+; AVX1-NEXT: # %bb.18: # %else26
; AVX1-NEXT: testb $2, %al
-; AVX1-NEXT: je .LBB4_20
-; AVX1-NEXT: # %bb.19: # %cond.load29
-; AVX1-NEXT: vpextrq $1, %xmm7, %rcx
-; AVX1-NEXT: vpinsrd $1, (%rcx), %xmm4, %xmm2
-; AVX1-NEXT: vblendps {{.*#+}} ymm4 = ymm2[0,1,2,3],ymm4[4,5,6,7]
-; AVX1-NEXT: .LBB4_20: # %else33
-; AVX1-NEXT: vpaddq %xmm5, %xmm10, %xmm8
+; AVX1-NEXT: jne .LBB4_19
+; AVX1-NEXT: .LBB4_20: # %else31
; AVX1-NEXT: testb $4, %al
-; AVX1-NEXT: vextractf128 $1, %ymm7, %xmm7
-; AVX1-NEXT: je .LBB4_22
-; AVX1-NEXT: # %bb.21: # %cond.load35
-; AVX1-NEXT: vmovq %xmm7, %rcx
-; AVX1-NEXT: vpinsrd $2, (%rcx), %xmm4, %xmm2
-; AVX1-NEXT: vblendps {{.*#+}} ymm4 = ymm2[0,1,2,3],ymm4[4,5,6,7]
-; AVX1-NEXT: .LBB4_22: # %else39
+; AVX1-NEXT: jne .LBB4_21
+; AVX1-NEXT: .LBB4_22: # %else36
; AVX1-NEXT: testb $8, %al
-; AVX1-NEXT: je .LBB4_24
-; AVX1-NEXT: # %bb.23: # %cond.load41
-; AVX1-NEXT: vpextrq $1, %xmm7, %rcx
-; AVX1-NEXT: vpinsrd $3, (%rcx), %xmm4, %xmm2
-; AVX1-NEXT: vblendps {{.*#+}} ymm4 = ymm2[0,1,2,3],ymm4[4,5,6,7]
-; AVX1-NEXT: .LBB4_24: # %else45
-; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm8, %ymm7
+; AVX1-NEXT: jne .LBB4_23
+; AVX1-NEXT: .LBB4_24: # %else41
; AVX1-NEXT: testb $16, %al
-; AVX1-NEXT: je .LBB4_26
-; AVX1-NEXT: # %bb.25: # %cond.load47
-; AVX1-NEXT: vmovq %xmm7, %rcx
-; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm2
-; AVX1-NEXT: vpinsrd $0, (%rcx), %xmm2, %xmm2
-; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm4, %ymm4
-; AVX1-NEXT: .LBB4_26: # %else51
+; AVX1-NEXT: jne .LBB4_25
+; AVX1-NEXT: .LBB4_26: # %else46
; AVX1-NEXT: testb $32, %al
-; AVX1-NEXT: je .LBB4_28
-; AVX1-NEXT: # %bb.27: # %cond.load53
-; AVX1-NEXT: vpextrq $1, %xmm7, %rcx
-; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm2
-; AVX1-NEXT: vpinsrd $1, (%rcx), %xmm2, %xmm2
-; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm4, %ymm4
-; AVX1-NEXT: .LBB4_28: # %else57
+; AVX1-NEXT: jne .LBB4_27
+; AVX1-NEXT: .LBB4_28: # %else51
; AVX1-NEXT: testb $64, %al
-; AVX1-NEXT: vextractf128 $1, %ymm7, %xmm7
-; AVX1-NEXT: je .LBB4_30
-; AVX1-NEXT: # %bb.29: # %cond.load59
-; AVX1-NEXT: vmovq %xmm7, %rcx
-; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm2
-; AVX1-NEXT: vpinsrd $2, (%rcx), %xmm2, %xmm2
-; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm4, %ymm4
-; AVX1-NEXT: .LBB4_30: # %else63
+; AVX1-NEXT: jne .LBB4_29
+; AVX1-NEXT: .LBB4_30: # %else56
; AVX1-NEXT: testb $-128, %al
; AVX1-NEXT: je .LBB4_32
-; AVX1-NEXT: # %bb.31: # %cond.load65
-; AVX1-NEXT: vpextrq $1, %xmm7, %rax
-; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm2
-; AVX1-NEXT: vpinsrd $3, (%rax), %xmm2, %xmm2
-; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm4, %ymm4
-; AVX1-NEXT: .LBB4_32: # %else69
-; AVX1-NEXT: vpaddq %xmm5, %xmm10, %xmm2
-; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm7
-; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
-; AVX1-NEXT: vpcmpeqd %xmm2, %xmm9, %xmm6
-; AVX1-NEXT: vpcmpeqd %xmm2, %xmm0, %xmm0
-; AVX1-NEXT: vinsertf128 $1, %xmm6, %ymm0, %ymm0
+; AVX1-NEXT: .LBB4_31: # %cond.load58
+; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4
+; AVX1-NEXT: vpinsrd $3, c+{{.*}}(%rip), %xmm4, %xmm4
+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3
+; AVX1-NEXT: .LBB4_32: # %else61
+; AVX1-NEXT: vpxor %xmm4, %xmm4, %xmm4
+; AVX1-NEXT: vpcmpeqd %xmm4, %xmm2, %xmm2
+; AVX1-NEXT: vpcmpeqd %xmm4, %xmm0, %xmm0
+; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX1-NEXT: vmovmskps %ymm0, %eax
; AVX1-NEXT: testb $1, %al
; AVX1-NEXT: # implicit-def: $ymm0
-; AVX1-NEXT: je .LBB4_34
-; AVX1-NEXT: # %bb.33: # %cond.load72
-; AVX1-NEXT: vmovq %xmm7, %rcx
-; AVX1-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
-; AVX1-NEXT: .LBB4_34: # %else76
+; AVX1-NEXT: jne .LBB4_33
+; AVX1-NEXT: # %bb.34: # %else67
; AVX1-NEXT: testb $2, %al
-; AVX1-NEXT: je .LBB4_36
-; AVX1-NEXT: # %bb.35: # %cond.load78
-; AVX1-NEXT: vpextrq $1, %xmm7, %rcx
-; AVX1-NEXT: vpinsrd $1, (%rcx), %xmm0, %xmm2
-; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm2[0,1,2,3],ymm0[4,5,6,7]
-; AVX1-NEXT: .LBB4_36: # %else82
-; AVX1-NEXT: vpaddq %xmm5, %xmm10, %xmm2
+; AVX1-NEXT: jne .LBB4_35
+; AVX1-NEXT: .LBB4_36: # %else72
; AVX1-NEXT: testb $4, %al
-; AVX1-NEXT: vextractf128 $1, %ymm7, %xmm5
-; AVX1-NEXT: je .LBB4_38
-; AVX1-NEXT: # %bb.37: # %cond.load84
-; AVX1-NEXT: vmovq %xmm5, %rcx
-; AVX1-NEXT: vpinsrd $2, (%rcx), %xmm0, %xmm6
-; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm6[0,1,2,3],ymm0[4,5,6,7]
-; AVX1-NEXT: .LBB4_38: # %else88
+; AVX1-NEXT: jne .LBB4_37
+; AVX1-NEXT: .LBB4_38: # %else77
; AVX1-NEXT: testb $8, %al
-; AVX1-NEXT: je .LBB4_40
-; AVX1-NEXT: # %bb.39: # %cond.load90
-; AVX1-NEXT: vpextrq $1, %xmm5, %rcx
-; AVX1-NEXT: vpinsrd $3, (%rcx), %xmm0, %xmm5
-; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm5[0,1,2,3],ymm0[4,5,6,7]
-; AVX1-NEXT: .LBB4_40: # %else94
-; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2
+; AVX1-NEXT: jne .LBB4_39
+; AVX1-NEXT: .LBB4_40: # %else82
; AVX1-NEXT: testb $16, %al
; AVX1-NEXT: je .LBB4_42
-; AVX1-NEXT: # %bb.41: # %cond.load96
-; AVX1-NEXT: vmovq %xmm2, %rcx
-; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
-; AVX1-NEXT: vpinsrd $0, (%rcx), %xmm3, %xmm3
-; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0
-; AVX1-NEXT: .LBB4_42: # %else100
-; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm3
-; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm5
-; AVX1-NEXT: vpaddd %xmm4, %xmm1, %xmm1
+; AVX1-NEXT: .LBB4_41: # %cond.load84
+; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
+; AVX1-NEXT: vpinsrd $0, c+{{.*}}(%rip), %xmm2, %xmm2
+; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
+; AVX1-NEXT: .LBB4_42: # %else87
+; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm2
+; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm4
+; AVX1-NEXT: vpaddd %xmm3, %xmm1, %xmm1
; AVX1-NEXT: testb $32, %al
; AVX1-NEXT: je .LBB4_44
-; AVX1-NEXT: # %bb.43: # %cond.load102
-; AVX1-NEXT: vpextrq $1, %xmm2, %rcx
-; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm4
-; AVX1-NEXT: vpinsrd $1, (%rcx), %xmm4, %xmm4
-; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm0, %ymm0
-; AVX1-NEXT: .LBB4_44: # %else106
-; AVX1-NEXT: vpaddd %xmm3, %xmm5, %xmm3
+; AVX1-NEXT: # %bb.43: # %cond.load89
+; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
+; AVX1-NEXT: vpinsrd $1, c+{{.*}}(%rip), %xmm3, %xmm3
+; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0
+; AVX1-NEXT: .LBB4_44: # %else92
+; AVX1-NEXT: vpaddd %xmm2, %xmm4, %xmm2
; AVX1-NEXT: testb $64, %al
-; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2
; AVX1-NEXT: je .LBB4_46
-; AVX1-NEXT: # %bb.45: # %cond.load108
-; AVX1-NEXT: vmovq %xmm2, %rcx
-; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm4
-; AVX1-NEXT: vpinsrd $2, (%rcx), %xmm4, %xmm4
-; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm0, %ymm0
-; AVX1-NEXT: .LBB4_46: # %else112
-; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1
+; AVX1-NEXT: # %bb.45: # %cond.load94
+; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
+; AVX1-NEXT: vpinsrd $2, c+{{.*}}(%rip), %xmm3, %xmm3
+; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0
+; AVX1-NEXT: .LBB4_46: # %else97
+; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
; AVX1-NEXT: testb $-128, %al
; AVX1-NEXT: je .LBB4_48
-; AVX1-NEXT: # %bb.47: # %cond.load114
-; AVX1-NEXT: vpextrq $1, %xmm2, %rax
+; AVX1-NEXT: # %bb.47: # %cond.load99
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
-; AVX1-NEXT: vpinsrd $3, (%rax), %xmm2, %xmm2
+; AVX1-NEXT: vpinsrd $3, c+{{.*}}(%rip), %xmm2, %xmm2
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
-; AVX1-NEXT: .LBB4_48: # %else118
+; AVX1-NEXT: .LBB4_48: # %else102
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
; AVX1-NEXT: vpaddd %xmm2, %xmm3, %xmm2
; AVX1-NEXT: vpaddd %xmm0, %xmm1, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX1-NEXT: retq
+; AVX1-NEXT: .LBB4_1: # %cond.load
+; AVX1-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; AVX1-NEXT: testb $2, %al
+; AVX1-NEXT: je .LBB4_4
+; AVX1-NEXT: .LBB4_3: # %cond.load1
+; AVX1-NEXT: vpinsrd $1, c+{{.*}}(%rip), %xmm1, %xmm3
+; AVX1-NEXT: vblendps {{.*#+}} ymm1 = ymm3[0,1,2,3],ymm1[4,5,6,7]
+; AVX1-NEXT: testb $4, %al
+; AVX1-NEXT: je .LBB4_6
+; AVX1-NEXT: .LBB4_5: # %cond.load4
+; AVX1-NEXT: vpinsrd $2, c+{{.*}}(%rip), %xmm1, %xmm3
+; AVX1-NEXT: vblendps {{.*#+}} ymm1 = ymm3[0,1,2,3],ymm1[4,5,6,7]
+; AVX1-NEXT: testb $8, %al
+; AVX1-NEXT: je .LBB4_8
+; AVX1-NEXT: .LBB4_7: # %cond.load7
+; AVX1-NEXT: vpinsrd $3, c+{{.*}}(%rip), %xmm1, %xmm3
+; AVX1-NEXT: vblendps {{.*#+}} ymm1 = ymm3[0,1,2,3],ymm1[4,5,6,7]
+; AVX1-NEXT: testb $16, %al
+; AVX1-NEXT: je .LBB4_10
+; AVX1-NEXT: .LBB4_9: # %cond.load10
+; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
+; AVX1-NEXT: vpinsrd $0, c+{{.*}}(%rip), %xmm3, %xmm3
+; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1
+; AVX1-NEXT: testb $32, %al
+; AVX1-NEXT: je .LBB4_12
+; AVX1-NEXT: .LBB4_11: # %cond.load13
+; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
+; AVX1-NEXT: vpinsrd $1, c+{{.*}}(%rip), %xmm3, %xmm3
+; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1
+; AVX1-NEXT: testb $64, %al
+; AVX1-NEXT: je .LBB4_14
+; AVX1-NEXT: .LBB4_13: # %cond.load16
+; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
+; AVX1-NEXT: vpinsrd $2, c+{{.*}}(%rip), %xmm3, %xmm3
+; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1
+; AVX1-NEXT: testb $-128, %al
+; AVX1-NEXT: jne .LBB4_15
+; AVX1-NEXT: jmp .LBB4_16
+; AVX1-NEXT: .LBB4_17: # %cond.load23
+; AVX1-NEXT: vmovd {{.*#+}} xmm3 = mem[0],zero,zero,zero
+; AVX1-NEXT: testb $2, %al
+; AVX1-NEXT: je .LBB4_20
+; AVX1-NEXT: .LBB4_19: # %cond.load28
+; AVX1-NEXT: vpinsrd $1, c+{{.*}}(%rip), %xmm3, %xmm4
+; AVX1-NEXT: vblendps {{.*#+}} ymm3 = ymm4[0,1,2,3],ymm3[4,5,6,7]
+; AVX1-NEXT: testb $4, %al
+; AVX1-NEXT: je .LBB4_22
+; AVX1-NEXT: .LBB4_21: # %cond.load33
+; AVX1-NEXT: vpinsrd $2, c+{{.*}}(%rip), %xmm3, %xmm4
+; AVX1-NEXT: vblendps {{.*#+}} ymm3 = ymm4[0,1,2,3],ymm3[4,5,6,7]
+; AVX1-NEXT: testb $8, %al
+; AVX1-NEXT: je .LBB4_24
+; AVX1-NEXT: .LBB4_23: # %cond.load38
+; AVX1-NEXT: vpinsrd $3, c+{{.*}}(%rip), %xmm3, %xmm4
+; AVX1-NEXT: vblendps {{.*#+}} ymm3 = ymm4[0,1,2,3],ymm3[4,5,6,7]
+; AVX1-NEXT: testb $16, %al
+; AVX1-NEXT: je .LBB4_26
+; AVX1-NEXT: .LBB4_25: # %cond.load43
+; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4
+; AVX1-NEXT: vpinsrd $0, c+{{.*}}(%rip), %xmm4, %xmm4
+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3
+; AVX1-NEXT: testb $32, %al
+; AVX1-NEXT: je .LBB4_28
+; AVX1-NEXT: .LBB4_27: # %cond.load48
+; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4
+; AVX1-NEXT: vpinsrd $1, c+{{.*}}(%rip), %xmm4, %xmm4
+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3
+; AVX1-NEXT: testb $64, %al
+; AVX1-NEXT: je .LBB4_30
+; AVX1-NEXT: .LBB4_29: # %cond.load53
+; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4
+; AVX1-NEXT: vpinsrd $2, c+{{.*}}(%rip), %xmm4, %xmm4
+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3
+; AVX1-NEXT: testb $-128, %al
+; AVX1-NEXT: jne .LBB4_31
+; AVX1-NEXT: jmp .LBB4_32
+; AVX1-NEXT: .LBB4_33: # %cond.load64
+; AVX1-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; AVX1-NEXT: testb $2, %al
+; AVX1-NEXT: je .LBB4_36
+; AVX1-NEXT: .LBB4_35: # %cond.load69
+; AVX1-NEXT: vpinsrd $1, c+{{.*}}(%rip), %xmm0, %xmm2
+; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm2[0,1,2,3],ymm0[4,5,6,7]
+; AVX1-NEXT: testb $4, %al
+; AVX1-NEXT: je .LBB4_38
+; AVX1-NEXT: .LBB4_37: # %cond.load74
+; AVX1-NEXT: vpinsrd $2, c+{{.*}}(%rip), %xmm0, %xmm2
+; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm2[0,1,2,3],ymm0[4,5,6,7]
+; AVX1-NEXT: testb $8, %al
+; AVX1-NEXT: je .LBB4_40
+; AVX1-NEXT: .LBB4_39: # %cond.load79
+; AVX1-NEXT: vpinsrd $3, c+{{.*}}(%rip), %xmm0, %xmm2
+; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm2[0,1,2,3],ymm0[4,5,6,7]
+; AVX1-NEXT: testb $16, %al
+; AVX1-NEXT: jne .LBB4_41
+; AVX1-NEXT: jmp .LBB4_42
;
; AVX2-LABEL: gather_v8i32_v8i32:
; AVX2: # %bb.0:
-; AVX2-NEXT: movl $c, %eax
-; AVX2-NEXT: vmovq %rax, %xmm1
-; AVX2-NEXT: vpbroadcastq %xmm1, %ymm2
-; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm1 = [12,12,12,12]
-; AVX2-NEXT: vpaddq %ymm1, %ymm2, %ymm3
; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX2-NEXT: vpcmpeqd %ymm1, %ymm0, %ymm1
; AVX2-NEXT: vmovmskps %ymm1, %eax
; AVX2-NEXT: testb $1, %al
; AVX2-NEXT: # implicit-def: $ymm1
-; AVX2-NEXT: je .LBB4_2
-; AVX2-NEXT: # %bb.1: # %cond.load
-; AVX2-NEXT: vmovq %xmm3, %rcx
-; AVX2-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero
-; AVX2-NEXT: .LBB4_2: # %else
+; AVX2-NEXT: jne .LBB4_1
+; AVX2-NEXT: # %bb.2: # %else
; AVX2-NEXT: testb $2, %al
-; AVX2-NEXT: je .LBB4_4
-; AVX2-NEXT: # %bb.3: # %cond.load1
-; AVX2-NEXT: vpextrq $1, %xmm3, %rcx
-; AVX2-NEXT: vpinsrd $1, (%rcx), %xmm1, %xmm4
-; AVX2-NEXT: vpblendd {{.*#+}} ymm1 = ymm4[0,1,2,3],ymm1[4,5,6,7]
+; AVX2-NEXT: jne .LBB4_3
; AVX2-NEXT: .LBB4_4: # %else2
; AVX2-NEXT: testb $4, %al
-; AVX2-NEXT: vextracti128 $1, %ymm3, %xmm4
; AVX2-NEXT: jne .LBB4_5
-; AVX2-NEXT: # %bb.6: # %else5
+; AVX2-NEXT: .LBB4_6: # %else5
; AVX2-NEXT: testb $8, %al
; AVX2-NEXT: jne .LBB4_7
; AVX2-NEXT: .LBB4_8: # %else8
@@ -1519,197 +1467,185 @@ define <8 x i32> @gather_v8i32_v8i32(<8 x i32> %trigger) {
; AVX2-NEXT: testb $-128, %al
; AVX2-NEXT: je .LBB4_16
; AVX2-NEXT: .LBB4_15: # %cond.load19
-; AVX2-NEXT: vpextrq $1, %xmm4, %rax
-; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm3
-; AVX2-NEXT: vpinsrd $3, (%rax), %xmm3, %xmm3
-; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm1, %ymm1
+; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm2
+; AVX2-NEXT: vpinsrd $3, c+{{.*}}(%rip), %xmm2, %xmm2
+; AVX2-NEXT: vinserti128 $1, %xmm2, %ymm1, %ymm1
; AVX2-NEXT: .LBB4_16: # %else20
-; AVX2-NEXT: vpxor %xmm4, %xmm4, %xmm4
-; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm3 = [28,28,28,28]
-; AVX2-NEXT: vpaddq %ymm3, %ymm2, %ymm3
-; AVX2-NEXT: vpcmpeqd %ymm4, %ymm0, %ymm2
+; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
+; AVX2-NEXT: vpcmpeqd %ymm2, %ymm0, %ymm2
; AVX2-NEXT: vmovmskps %ymm2, %eax
; AVX2-NEXT: testb $1, %al
; AVX2-NEXT: # implicit-def: $ymm2
-; AVX2-NEXT: je .LBB4_18
-; AVX2-NEXT: # %bb.17: # %cond.load23
-; AVX2-NEXT: vmovq %xmm3, %rcx
-; AVX2-NEXT: vmovd {{.*#+}} xmm2 = mem[0],zero,zero,zero
-; AVX2-NEXT: .LBB4_18: # %else27
+; AVX2-NEXT: jne .LBB4_17
+; AVX2-NEXT: # %bb.18: # %else26
; AVX2-NEXT: testb $2, %al
-; AVX2-NEXT: je .LBB4_20
-; AVX2-NEXT: # %bb.19: # %cond.load29
-; AVX2-NEXT: vpextrq $1, %xmm3, %rcx
-; AVX2-NEXT: vpinsrd $1, (%rcx), %xmm2, %xmm4
-; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm4[0,1,2,3],ymm2[4,5,6,7]
-; AVX2-NEXT: .LBB4_20: # %else33
+; AVX2-NEXT: jne .LBB4_19
+; AVX2-NEXT: .LBB4_20: # %else31
; AVX2-NEXT: testb $4, %al
-; AVX2-NEXT: vextracti128 $1, %ymm3, %xmm4
; AVX2-NEXT: jne .LBB4_21
-; AVX2-NEXT: # %bb.22: # %else39
+; AVX2-NEXT: .LBB4_22: # %else36
; AVX2-NEXT: testb $8, %al
; AVX2-NEXT: jne .LBB4_23
-; AVX2-NEXT: .LBB4_24: # %else45
+; AVX2-NEXT: .LBB4_24: # %else41
; AVX2-NEXT: testb $16, %al
; AVX2-NEXT: jne .LBB4_25
-; AVX2-NEXT: .LBB4_26: # %else51
+; AVX2-NEXT: .LBB4_26: # %else46
; AVX2-NEXT: testb $32, %al
; AVX2-NEXT: jne .LBB4_27
-; AVX2-NEXT: .LBB4_28: # %else57
+; AVX2-NEXT: .LBB4_28: # %else51
; AVX2-NEXT: testb $64, %al
; AVX2-NEXT: jne .LBB4_29
-; AVX2-NEXT: .LBB4_30: # %else63
+; AVX2-NEXT: .LBB4_30: # %else56
; AVX2-NEXT: testb $-128, %al
; AVX2-NEXT: je .LBB4_32
-; AVX2-NEXT: .LBB4_31: # %cond.load65
-; AVX2-NEXT: vpextrq $1, %xmm4, %rax
-; AVX2-NEXT: vextracti128 $1, %ymm2, %xmm5
-; AVX2-NEXT: vpinsrd $3, (%rax), %xmm5, %xmm5
-; AVX2-NEXT: vinserti128 $1, %xmm5, %ymm2, %ymm2
-; AVX2-NEXT: .LBB4_32: # %else69
-; AVX2-NEXT: vpxor %xmm5, %xmm5, %xmm5
-; AVX2-NEXT: vpcmpeqd %ymm5, %ymm0, %ymm0
+; AVX2-NEXT: .LBB4_31: # %cond.load58
+; AVX2-NEXT: vextracti128 $1, %ymm2, %xmm3
+; AVX2-NEXT: vpinsrd $3, c+{{.*}}(%rip), %xmm3, %xmm3
+; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2
+; AVX2-NEXT: .LBB4_32: # %else61
+; AVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3
+; AVX2-NEXT: vpcmpeqd %ymm3, %ymm0, %ymm0
; AVX2-NEXT: vmovmskps %ymm0, %eax
; AVX2-NEXT: testb $1, %al
; AVX2-NEXT: # implicit-def: $ymm0
; AVX2-NEXT: jne .LBB4_33
-; AVX2-NEXT: # %bb.34: # %else76
+; AVX2-NEXT: # %bb.34: # %else67
; AVX2-NEXT: testb $2, %al
; AVX2-NEXT: jne .LBB4_35
-; AVX2-NEXT: .LBB4_36: # %else82
+; AVX2-NEXT: .LBB4_36: # %else72
; AVX2-NEXT: testb $4, %al
; AVX2-NEXT: jne .LBB4_37
-; AVX2-NEXT: .LBB4_38: # %else88
+; AVX2-NEXT: .LBB4_38: # %else77
; AVX2-NEXT: testb $8, %al
; AVX2-NEXT: jne .LBB4_39
-; AVX2-NEXT: .LBB4_40: # %else94
+; AVX2-NEXT: .LBB4_40: # %else82
; AVX2-NEXT: testb $16, %al
; AVX2-NEXT: jne .LBB4_41
-; AVX2-NEXT: .LBB4_42: # %else100
+; AVX2-NEXT: .LBB4_42: # %else87
; AVX2-NEXT: testb $32, %al
; AVX2-NEXT: jne .LBB4_43
-; AVX2-NEXT: .LBB4_44: # %else106
+; AVX2-NEXT: .LBB4_44: # %else92
; AVX2-NEXT: testb $64, %al
; AVX2-NEXT: je .LBB4_46
-; AVX2-NEXT: .LBB4_45: # %cond.load108
-; AVX2-NEXT: vmovq %xmm4, %rcx
+; AVX2-NEXT: .LBB4_45: # %cond.load94
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm3
-; AVX2-NEXT: vpinsrd $2, (%rcx), %xmm3, %xmm3
+; AVX2-NEXT: vpinsrd $2, c+{{.*}}(%rip), %xmm3, %xmm3
; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm0, %ymm0
-; AVX2-NEXT: .LBB4_46: # %else112
+; AVX2-NEXT: .LBB4_46: # %else97
; AVX2-NEXT: vpaddd %ymm2, %ymm1, %ymm1
; AVX2-NEXT: testb $-128, %al
; AVX2-NEXT: je .LBB4_48
-; AVX2-NEXT: # %bb.47: # %cond.load114
-; AVX2-NEXT: vpextrq $1, %xmm4, %rax
+; AVX2-NEXT: # %bb.47: # %cond.load99
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
-; AVX2-NEXT: vpinsrd $3, (%rax), %xmm2, %xmm2
+; AVX2-NEXT: vpinsrd $3, c+{{.*}}(%rip), %xmm2, %xmm2
; AVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
-; AVX2-NEXT: .LBB4_48: # %else118
+; AVX2-NEXT: .LBB4_48: # %else102
; AVX2-NEXT: vpaddd %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
+; AVX2-NEXT: .LBB4_1: # %cond.load
+; AVX2-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; AVX2-NEXT: testb $2, %al
+; AVX2-NEXT: je .LBB4_4
+; AVX2-NEXT: .LBB4_3: # %cond.load1
+; AVX2-NEXT: vpinsrd $1, c+{{.*}}(%rip), %xmm1, %xmm2
+; AVX2-NEXT: vpblendd {{.*#+}} ymm1 = ymm2[0,1,2,3],ymm1[4,5,6,7]
+; AVX2-NEXT: testb $4, %al
+; AVX2-NEXT: je .LBB4_6
; AVX2-NEXT: .LBB4_5: # %cond.load4
-; AVX2-NEXT: vmovq %xmm4, %rcx
-; AVX2-NEXT: vpinsrd $2, (%rcx), %xmm1, %xmm5
-; AVX2-NEXT: vpblendd {{.*#+}} ymm1 = ymm5[0,1,2,3],ymm1[4,5,6,7]
+; AVX2-NEXT: vpinsrd $2, c+{{.*}}(%rip), %xmm1, %xmm2
+; AVX2-NEXT: vpblendd {{.*#+}} ymm1 = ymm2[0,1,2,3],ymm1[4,5,6,7]
; AVX2-NEXT: testb $8, %al
; AVX2-NEXT: je .LBB4_8
; AVX2-NEXT: .LBB4_7: # %cond.load7
-; AVX2-NEXT: vpextrq $1, %xmm4, %rcx
-; AVX2-NEXT: vpinsrd $3, (%rcx), %xmm1, %xmm5
-; AVX2-NEXT: vpblendd {{.*#+}} ymm1 = ymm5[0,1,2,3],ymm1[4,5,6,7]
+; AVX2-NEXT: vpinsrd $3, c+{{.*}}(%rip), %xmm1, %xmm2
+; AVX2-NEXT: vpblendd {{.*#+}} ymm1 = ymm2[0,1,2,3],ymm1[4,5,6,7]
; AVX2-NEXT: testb $16, %al
; AVX2-NEXT: je .LBB4_10
; AVX2-NEXT: .LBB4_9: # %cond.load10
-; AVX2-NEXT: vmovq %xmm3, %rcx
-; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm5
-; AVX2-NEXT: vpinsrd $0, (%rcx), %xmm5, %xmm5
-; AVX2-NEXT: vinserti128 $1, %xmm5, %ymm1, %ymm1
+; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm2
+; AVX2-NEXT: vpinsrd $0, c+{{.*}}(%rip), %xmm2, %xmm2
+; AVX2-NEXT: vinserti128 $1, %xmm2, %ymm1, %ymm1
; AVX2-NEXT: testb $32, %al
; AVX2-NEXT: je .LBB4_12
; AVX2-NEXT: .LBB4_11: # %cond.load13
-; AVX2-NEXT: vpextrq $1, %xmm3, %rcx
-; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm3
-; AVX2-NEXT: vpinsrd $1, (%rcx), %xmm3, %xmm3
-; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm1, %ymm1
+; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm2
+; AVX2-NEXT: vpinsrd $1, c+{{.*}}(%rip), %xmm2, %xmm2
+; AVX2-NEXT: vinserti128 $1, %xmm2, %ymm1, %ymm1
; AVX2-NEXT: testb $64, %al
; AVX2-NEXT: je .LBB4_14
; AVX2-NEXT: .LBB4_13: # %cond.load16
-; AVX2-NEXT: vmovq %xmm4, %rcx
-; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm3
-; AVX2-NEXT: vpinsrd $2, (%rcx), %xmm3, %xmm3
-; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm1, %ymm1
+; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm2
+; AVX2-NEXT: vpinsrd $2, c+{{.*}}(%rip), %xmm2, %xmm2
+; AVX2-NEXT: vinserti128 $1, %xmm2, %ymm1, %ymm1
; AVX2-NEXT: testb $-128, %al
; AVX2-NEXT: jne .LBB4_15
; AVX2-NEXT: jmp .LBB4_16
-; AVX2-NEXT: .LBB4_21: # %cond.load35
-; AVX2-NEXT: vmovq %xmm4, %rcx
-; AVX2-NEXT: vpinsrd $2, (%rcx), %xmm2, %xmm5
-; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm5[0,1,2,3],ymm2[4,5,6,7]
+; AVX2-NEXT: .LBB4_17: # %cond.load23
+; AVX2-NEXT: vmovd {{.*#+}} xmm2 = mem[0],zero,zero,zero
+; AVX2-NEXT: testb $2, %al
+; AVX2-NEXT: je .LBB4_20
+; AVX2-NEXT: .LBB4_19: # %cond.load28
+; AVX2-NEXT: vpinsrd $1, c+{{.*}}(%rip), %xmm2, %xmm3
+; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1,2,3],ymm2[4,5,6,7]
+; AVX2-NEXT: testb $4, %al
+; AVX2-NEXT: je .LBB4_22
+; AVX2-NEXT: .LBB4_21: # %cond.load33
+; AVX2-NEXT: vpinsrd $2, c+{{.*}}(%rip), %xmm2, %xmm3
+; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1,2,3],ymm2[4,5,6,7]
; AVX2-NEXT: testb $8, %al
; AVX2-NEXT: je .LBB4_24
-; AVX2-NEXT: .LBB4_23: # %cond.load41
-; AVX2-NEXT: vpextrq $1, %xmm4, %rcx
-; AVX2-NEXT: vpinsrd $3, (%rcx), %xmm2, %xmm5
-; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm5[0,1,2,3],ymm2[4,5,6,7]
+; AVX2-NEXT: .LBB4_23: # %cond.load38
+; AVX2-NEXT: vpinsrd $3, c+{{.*}}(%rip), %xmm2, %xmm3
+; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1,2,3],ymm2[4,5,6,7]
; AVX2-NEXT: testb $16, %al
; AVX2-NEXT: je .LBB4_26
-; AVX2-NEXT: .LBB4_25: # %cond.load47
-; AVX2-NEXT: vmovq %xmm3, %rcx
-; AVX2-NEXT: vextracti128 $1, %ymm2, %xmm5
-; AVX2-NEXT: vpinsrd $0, (%rcx), %xmm5, %xmm5
-; AVX2-NEXT: vinserti128 $1, %xmm5, %ymm2, %ymm2
+; AVX2-NEXT: .LBB4_25: # %cond.load43
+; AVX2-NEXT: vextracti128 $1, %ymm2, %xmm3
+; AVX2-NEXT: vpinsrd $0, c+{{.*}}(%rip), %xmm3, %xmm3
+; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2
; AVX2-NEXT: testb $32, %al
; AVX2-NEXT: je .LBB4_28
-; AVX2-NEXT: .LBB4_27: # %cond.load53
-; AVX2-NEXT: vpextrq $1, %xmm3, %rcx
-; AVX2-NEXT: vextracti128 $1, %ymm2, %xmm5
-; AVX2-NEXT: vpinsrd $1, (%rcx), %xmm5, %xmm5
-; AVX2-NEXT: vinserti128 $1, %xmm5, %ymm2, %ymm2
+; AVX2-NEXT: .LBB4_27: # %cond.load48
+; AVX2-NEXT: vextracti128 $1, %ymm2, %xmm3
+; AVX2-NEXT: vpinsrd $1, c+{{.*}}(%rip), %xmm3, %xmm3
+; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2
; AVX2-NEXT: testb $64, %al
; AVX2-NEXT: je .LBB4_30
-; AVX2-NEXT: .LBB4_29: # %cond.load59
-; AVX2-NEXT: vmovq %xmm4, %rcx
-; AVX2-NEXT: vextracti128 $1, %ymm2, %xmm5
-; AVX2-NEXT: vpinsrd $2, (%rcx), %xmm5, %xmm5
-; AVX2-NEXT: vinserti128 $1, %xmm5, %ymm2, %ymm2
+; AVX2-NEXT: .LBB4_29: # %cond.load53
+; AVX2-NEXT: vextracti128 $1, %ymm2, %xmm3
+; AVX2-NEXT: vpinsrd $2, c+{{.*}}(%rip), %xmm3, %xmm3
+; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2
; AVX2-NEXT: testb $-128, %al
; AVX2-NEXT: jne .LBB4_31
; AVX2-NEXT: jmp .LBB4_32
-; AVX2-NEXT: .LBB4_33: # %cond.load72
-; AVX2-NEXT: vmovq %xmm3, %rcx
+; AVX2-NEXT: .LBB4_33: # %cond.load64
; AVX2-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX2-NEXT: testb $2, %al
; AVX2-NEXT: je .LBB4_36
-; AVX2-NEXT: .LBB4_35: # %cond.load78
-; AVX2-NEXT: vpextrq $1, %xmm3, %rcx
-; AVX2-NEXT: vpinsrd $1, (%rcx), %xmm0, %xmm5
-; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm5[0,1,2,3],ymm0[4,5,6,7]
+; AVX2-NEXT: .LBB4_35: # %cond.load69
+; AVX2-NEXT: vpinsrd $1, c+{{.*}}(%rip), %xmm0, %xmm3
+; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm3[0,1,2,3],ymm0[4,5,6,7]
; AVX2-NEXT: testb $4, %al
; AVX2-NEXT: je .LBB4_38
-; AVX2-NEXT: .LBB4_37: # %cond.load84
-; AVX2-NEXT: vmovq %xmm4, %rcx
-; AVX2-NEXT: vpinsrd $2, (%rcx), %xmm0, %xmm5
-; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm5[0,1,2,3],ymm0[4,5,6,7]
+; AVX2-NEXT: .LBB4_37: # %cond.load74
+; AVX2-NEXT: vpinsrd $2, c+{{.*}}(%rip), %xmm0, %xmm3
+; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm3[0,1,2,3],ymm0[4,5,6,7]
; AVX2-NEXT: testb $8, %al
; AVX2-NEXT: je .LBB4_40
-; AVX2-NEXT: .LBB4_39: # %cond.load90
-; AVX2-NEXT: vpextrq $1, %xmm4, %rcx
-; AVX2-NEXT: vpinsrd $3, (%rcx), %xmm0, %xmm5
-; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm5[0,1,2,3],ymm0[4,5,6,7]
+; AVX2-NEXT: .LBB4_39: # %cond.load79
+; AVX2-NEXT: vpinsrd $3, c+{{.*}}(%rip), %xmm0, %xmm3
+; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm3[0,1,2,3],ymm0[4,5,6,7]
; AVX2-NEXT: testb $16, %al
; AVX2-NEXT: je .LBB4_42
-; AVX2-NEXT: .LBB4_41: # %cond.load96
-; AVX2-NEXT: vmovq %xmm3, %rcx
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm5
-; AVX2-NEXT: vpinsrd $0, (%rcx), %xmm5, %xmm5
-; AVX2-NEXT: vinserti128 $1, %xmm5, %ymm0, %ymm0
+; AVX2-NEXT: .LBB4_41: # %cond.load84
+; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm3
+; AVX2-NEXT: vpinsrd $0, c+{{.*}}(%rip), %xmm3, %xmm3
+; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm0, %ymm0
; AVX2-NEXT: testb $32, %al
; AVX2-NEXT: je .LBB4_44
-; AVX2-NEXT: .LBB4_43: # %cond.load102
-; AVX2-NEXT: vpextrq $1, %xmm3, %rcx
+; AVX2-NEXT: .LBB4_43: # %cond.load89
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm3
-; AVX2-NEXT: vpinsrd $1, (%rcx), %xmm3, %xmm3
+; AVX2-NEXT: vpinsrd $1, c+{{.*}}(%rip), %xmm3, %xmm3
; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm0, %ymm0
; AVX2-NEXT: testb $64, %al
; AVX2-NEXT: jne .LBB4_45
@@ -1721,25 +1657,21 @@ define <8 x i32> @gather_v8i32_v8i32(<8 x i32> %trigger) {
; AVX512-NEXT: vptestnmd %zmm0, %zmm0, %k0
; AVX512-NEXT: kshiftlw $8, %k0, %k0
; AVX512-NEXT: kshiftrw $8, %k0, %k1
-; AVX512-NEXT: vpxor %xmm0, %xmm0, %xmm0
+; AVX512-NEXT: vpbroadcastd {{.*#+}} zmm0 = [12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,12]
; AVX512-NEXT: kmovw %k1, %k2
-; AVX512-NEXT: vpgatherdd c+12(,%zmm0), %zmm1 {%k2}
-; AVX512-NEXT: vpgatherdd c+28(,%zmm0), %zmm2 {%k1}
+; AVX512-NEXT: vpgatherdd c(,%zmm0), %zmm1 {%k2}
+; AVX512-NEXT: vpbroadcastd {{.*#+}} zmm0 = [28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28]
+; AVX512-NEXT: vpgatherdd c(,%zmm0), %zmm2 {%k1}
; AVX512-NEXT: vpaddd %ymm2, %ymm2, %ymm0
; AVX512-NEXT: vpaddd %ymm0, %ymm1, %ymm0
; AVX512-NEXT: retq
- %1 = insertelement <8 x %struct.a*> undef, %struct.a* @c, i32 0
- %2 = shufflevector <8 x %struct.a*> %1, <8 x %struct.a*> undef, <8 x i32> zeroinitializer
- %3 = getelementptr %struct.a, <8 x %struct.a*> %2, <8 x i32> zeroinitializer, i32 0, i32 3
- %4 = icmp eq <8 x i32> %trigger, zeroinitializer
- %5 = call <8 x i32> @llvm.masked.gather.v8i32.v8p0i32(<8 x i32*> %3, i32 4, <8 x i1> %4, <8 x i32> undef)
- %6 = getelementptr %struct.a, <8 x %struct.a*> %2, <8 x i32> zeroinitializer, i32 3
- %7 = call <8 x i32> @llvm.masked.gather.v8i32.v8p0i32(<8 x i32*> %6, i32 4, <8 x i1> %4, <8 x i32> undef)
- %8 = add <8 x i32> %5, %7
- %9 = getelementptr %struct.a, <8 x %struct.a*> %2, i32 0, <8 x i32> <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>
- %10 = call <8 x i32> @llvm.masked.gather.v8i32.v8p0i32(<8 x i32*> %9, i32 4, <8 x i1> %4, <8 x i32> undef)
- %11 = add <8 x i32> %8, %10
- ret <8 x i32> %11
+ %1 = icmp eq <8 x i32> %trigger, zeroinitializer
+ %2 = call <8 x i32> @llvm.masked.gather.v8i32.v8p0i32(<8 x i32*> getelementptr (%struct.a, <8 x %struct.a*> <%struct.a* @c, %struct.a* @c, %struct.a* @c, %struct.a* @c, %struct.a* @c, %struct.a* @c, %struct.a* @c, %struct.a* @c>, <8 x i64> zeroinitializer, i32 0, <8 x i64> <i64 3, i64 3, i64 3, i64 3, i64 3, i64 3, i64 3, i64 3>), i32 4, <8 x i1> %1, <8 x i32> undef)
+ %3 = call <8 x i32> @llvm.masked.gather.v8i32.v8p0i32(<8 x i32*> getelementptr (%struct.a, <8 x %struct.a*> <%struct.a* @c, %struct.a* @c, %struct.a* @c, %struct.a* @c, %struct.a* @c, %struct.a* @c, %struct.a* @c, %struct.a* @c>, <8 x i64> zeroinitializer, i32 3), i32 4, <8 x i1> %1, <8 x i32> undef)
+ %4 = add <8 x i32> %2, %3
+ %5 = call <8 x i32> @llvm.masked.gather.v8i32.v8p0i32(<8 x i32*> getelementptr (%struct.a, <8 x %struct.a*> <%struct.a* @c, %struct.a* @c, %struct.a* @c, %struct.a* @c, %struct.a* @c, %struct.a* @c, %struct.a* @c, %struct.a* @c>, <8 x i64> zeroinitializer, i32 3), i32 4, <8 x i1> %1, <8 x i32> undef)
+ %6 = add <8 x i32> %4, %5
+ ret <8 x i32> %6
}
declare <2 x double> @llvm.masked.gather.v2f64.v2p0f64(<2 x double*>, i32, <2 x i1>, <2 x double>)
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