[PATCH] D98587: [X86] Optimize vXi8 MULHS on targets where we can't sign_extend to the next register size.
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 23 05:40:38 PDT 2021
RKSimon added inline comments.
================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:27492
+ // We'll take different approaches for signed and unsigned.
+ // For unsigned we'll use punpcklbw/punpckhbw to put zero extend the bytes
+ // and use pmullw to calculate the full 16-bit product.
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"put zero extend the bytes" ?
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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:27504
+ ALo = DAG.getBitcast(
+ ExVT, getUnpackl(DAG, dl, VT, DAG.getConstant(0, dl, VT), A));
+ AHi = DAG.getBitcast(
----------------
Pull out repeated DAG.getConstant(0, dl, VT) calls
================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:27546
+ BHi = DAG.getBitcast(
+ ExVT, getUnpackh(DAG, dl, VT, DAG.getConstant(0, dl, VT), B));
} else {
----------------
More repeated DAG.getConstant(0, dl, VT) calls?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D98587/new/
https://reviews.llvm.org/D98587
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