[PATCH] D98491: [AMDGPU] Split GCN subtarget features for unaligned access

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

In D98491#2643944 <https://reviews.llvm.org/D98491#2643944>, @hsmhsm wrote:

> @mbrkusanin
>
> I see some comments from @rampitec  and @arsenm, and @rampitec had also made below comments in the related internal JIRA ticket.
>
>   Comments from @rampitec in JIRA ticket:
>   Disabling unaligned dword access is not acceptable for HSA.
>   My proposal was simple: prefer ds_read2_b64 (and write) over b128 if alignment < 16. I never heard of b64 performance issues though, so the rest is the same as now: create a widest load/store possible with that one exception for b128.
>
> From the JIRA comments, I also see @foad is in agreement with above comments.  So, it looks like, we should avoid accessing ds_read_128/ds_write_128 when the alignment is < 16. I am not sure, what you think here, but, your comments are very valuable to make further progress here.
>
> If we all agree with above, then looks like the the file `DSInstructions.td` has to go below changes.

I strongly disagree with splitting features in a way that does not correspond with the hardware controls to match a desired output.


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https://reviews.llvm.org/D98491