[PATCH] D99122: [AMDGPU] Reserve ELF code
Tony Tye via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 22 15:30:39 PDT 2021
t-tye created this revision.
t-tye added a reviewer: kzhuravl.
Herald added subscribers: kerbowa, tpr, dstuttard, yaxunl, nhaehnle, jvesely.
t-tye requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.
Reserve AMD GPU ELF machine code 0x040.
Minor AMDGPUUsage format consistency change.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D99122
Files:
llvm/docs/AMDGPUUsage.rst
llvm/include/llvm/BinaryFormat/ELF.h
Index: llvm/include/llvm/BinaryFormat/ELF.h
===================================================================
--- llvm/include/llvm/BinaryFormat/ELF.h
+++ llvm/include/llvm/BinaryFormat/ELF.h
@@ -734,6 +734,7 @@
EF_AMDGPU_MACH_AMDGCN_RESERVED_0X3E = 0x03e,
EF_AMDGPU_MACH_AMDGCN_GFX90A = 0x03f,
+ EF_AMDGPU_MACH_AMDGCN_RESERVED_0X40 = 0x040,
// First/last AMDGCN-based processors.
EF_AMDGPU_MACH_AMDGCN_FIRST = EF_AMDGPU_MACH_AMDGCN_GFX600,
EF_AMDGPU_MACH_AMDGCN_LAST = EF_AMDGPU_MACH_AMDGCN_GFX90A,
Index: llvm/docs/AMDGPUUsage.rst
===================================================================
--- llvm/docs/AMDGPUUsage.rst
+++ llvm/docs/AMDGPUUsage.rst
@@ -4104,9 +4104,9 @@
work-group. Granularity is
device specific:
- GFX6:
+ GFX6
roundup(lds-size / (64 * 4))
- GFX7-GFX10:
+ GFX7-GFX10
roundup(lds-size / (128 * 4))
24 1 bit ENABLE_EXCEPTION_IEEE_754_FP Wavefront starts execution
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