[llvm] 046bb8e - [NFC][InstCombine] Autogenerate some checklines being affected by upcoming change
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 22 14:52:23 PDT 2021
Author: Roman Lebedev
Date: 2021-03-23T00:51:18+03:00
New Revision: 046bb8ea7c86603177ab4c58d36c81481567ff37
URL: https://github.com/llvm/llvm-project/commit/046bb8ea7c86603177ab4c58d36c81481567ff37
DIFF: https://github.com/llvm/llvm-project/commit/046bb8ea7c86603177ab4c58d36c81481567ff37.diff
LOG: [NFC][InstCombine] Autogenerate some checklines being affected by upcoming change
Added:
Modified:
llvm/test/Transforms/InstCombine/2009-02-20-InstCombine-SROA.ll
llvm/test/Transforms/InstCombine/PR30597.ll
llvm/test/Transforms/InstCombine/apint-call-cast-target.ll
llvm/test/Transforms/InstCombine/cast_ptr.ll
llvm/test/Transforms/InstCombine/icmp.ll
llvm/test/Transforms/InstCombine/indexed-gep-compares.ll
llvm/test/Transforms/InstCombine/intptr1.ll
llvm/test/Transforms/InstCombine/intptr3.ll
llvm/test/Transforms/InstCombine/intptr7.ll
llvm/test/Transforms/InstCombine/multi-size-address-space-pointer.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/2009-02-20-InstCombine-SROA.ll b/llvm/test/Transforms/InstCombine/2009-02-20-InstCombine-SROA.ll
index d8c8e1e02025..86b9bc57fe50 100644
--- a/llvm/test/Transforms/InstCombine/2009-02-20-InstCombine-SROA.ll
+++ b/llvm/test/Transforms/InstCombine/2009-02-20-InstCombine-SROA.ll
@@ -1,4 +1,7 @@
-; RUN: opt < %s -instcombine -sroa -S | not grep " = alloca"
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -instcombine -S | FileCheck --check-prefix=IC %s
+; RUN: opt < %s -instcombine -sroa -S | FileCheck --check-prefix=IC_SROA %s
+
; rdar://6417724
; Instcombine shouldn't do anything to this function that prevents promoting the allocas inside it.
@@ -15,6 +18,262 @@ target triple = "i386-apple-darwin9.6"
%"struct.std::vector<int,std::allocator<int> >" = type { %"struct.std::_Vector_base<int,std::allocator<int> >" }
define i32* @_Z3fooRSt6vectorIiSaIiEE(%"struct.std::vector<int,std::allocator<int> >"* %X) {
+; IC-LABEL: @_Z3fooRSt6vectorIiSaIiEE(
+; IC-NEXT: entry:
+; IC-NEXT: [[__FIRST_ADDR_I_I:%.*]] = alloca %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", align 8
+; IC-NEXT: [[__LAST_ADDR_I_I:%.*]] = alloca %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", align 8
+; IC-NEXT: [[TMP0:%.*]] = alloca i32, align 4
+; IC-NEXT: store i32 42, i32* [[TMP0]], align 4
+; IC-NEXT: [[TMP1:%.*]] = getelementptr %"struct.std::vector<int,std::allocator<int> >", %"struct.std::vector<int,std::allocator<int> >"* [[X:%.*]], i32 0, i32 0, i32 0, i32 1
+; IC-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 4
+; IC-NEXT: [[TMP3:%.*]] = getelementptr %"struct.std::vector<int,std::allocator<int> >", %"struct.std::vector<int,std::allocator<int> >"* [[X]], i32 0, i32 0, i32 0, i32 0
+; IC-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 4
+; IC-NEXT: [[TMP5:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: store i32* [[TMP4]], i32** [[TMP5]], align 8
+; IC-NEXT: [[TMP6:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__LAST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: store i32* [[TMP2]], i32** [[TMP6]], align 8
+; IC-NEXT: [[TMP7:%.*]] = ptrtoint i32* [[TMP2]] to i32
+; IC-NEXT: [[TMP8:%.*]] = ptrtoint i32* [[TMP4]] to i32
+; IC-NEXT: [[TMP9:%.*]] = sub i32 [[TMP7]], [[TMP8]]
+; IC-NEXT: [[TMP10:%.*]] = ashr i32 [[TMP9]], 4
+; IC-NEXT: br label [[BB12_I_I:%.*]]
+; IC: bb.i.i:
+; IC-NEXT: [[TMP11:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: [[TMP12:%.*]] = load i32*, i32** [[TMP11]], align 8
+; IC-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
+; IC-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP0]], align 4
+; IC-NEXT: [[TMP15:%.*]] = icmp eq i32 [[TMP13]], [[TMP14]]
+; IC-NEXT: br i1 [[TMP15]], label [[BB1_I_I:%.*]], label [[BB2_I_I:%.*]]
+; IC: bb1.i.i:
+; IC-NEXT: [[TMP16:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: [[TMP17:%.*]] = load i32*, i32** [[TMP16]], align 8
+; IC-NEXT: br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT:%.*]]
+; IC: bb2.i.i:
+; IC-NEXT: [[TMP18:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: [[TMP19:%.*]] = load i32*, i32** [[TMP18]], align 8
+; IC-NEXT: [[TMP20:%.*]] = getelementptr i32, i32* [[TMP19]], i32 1
+; IC-NEXT: [[TMP21:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: store i32* [[TMP20]], i32** [[TMP21]], align 8
+; IC-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP20]], align 4
+; IC-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP0]], align 4
+; IC-NEXT: [[TMP24:%.*]] = icmp eq i32 [[TMP22]], [[TMP23]]
+; IC-NEXT: br i1 [[TMP24]], label [[BB4_I_I:%.*]], label [[BB5_I_I:%.*]]
+; IC: bb4.i.i:
+; IC-NEXT: [[TMP25:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP25]], align 8
+; IC-NEXT: br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]]
+; IC: bb5.i.i:
+; IC-NEXT: [[TMP27:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: [[TMP28:%.*]] = load i32*, i32** [[TMP27]], align 8
+; IC-NEXT: [[TMP29:%.*]] = getelementptr i32, i32* [[TMP28]], i32 1
+; IC-NEXT: [[TMP30:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: store i32* [[TMP29]], i32** [[TMP30]], align 8
+; IC-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP29]], align 4
+; IC-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP0]], align 4
+; IC-NEXT: [[TMP33:%.*]] = icmp eq i32 [[TMP31]], [[TMP32]]
+; IC-NEXT: br i1 [[TMP33]], label [[BB7_I_I:%.*]], label [[BB8_I_I:%.*]]
+; IC: bb7.i.i:
+; IC-NEXT: [[TMP34:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: [[TMP35:%.*]] = load i32*, i32** [[TMP34]], align 8
+; IC-NEXT: br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]]
+; IC: bb8.i.i:
+; IC-NEXT: [[TMP36:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: [[TMP37:%.*]] = load i32*, i32** [[TMP36]], align 8
+; IC-NEXT: [[TMP38:%.*]] = getelementptr i32, i32* [[TMP37]], i32 1
+; IC-NEXT: [[TMP39:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: store i32* [[TMP38]], i32** [[TMP39]], align 8
+; IC-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP38]], align 4
+; IC-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP0]], align 4
+; IC-NEXT: [[TMP42:%.*]] = icmp eq i32 [[TMP40]], [[TMP41]]
+; IC-NEXT: br i1 [[TMP42]], label [[BB10_I_I:%.*]], label [[BB11_I_I:%.*]]
+; IC: bb10.i.i:
+; IC-NEXT: [[TMP43:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: [[TMP44:%.*]] = load i32*, i32** [[TMP43]], align 8
+; IC-NEXT: br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]]
+; IC: bb11.i.i:
+; IC-NEXT: [[TMP45:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: [[TMP46:%.*]] = load i32*, i32** [[TMP45]], align 8
+; IC-NEXT: [[TMP47:%.*]] = getelementptr i32, i32* [[TMP46]], i32 1
+; IC-NEXT: [[TMP48:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: store i32* [[TMP47]], i32** [[TMP48]], align 8
+; IC-NEXT: [[TMP49:%.*]] = add i32 [[__TRIP_COUNT_0_I_I:%.*]], -1
+; IC-NEXT: br label [[BB12_I_I]]
+; IC: bb12.i.i:
+; IC-NEXT: [[__TRIP_COUNT_0_I_I]] = phi i32 [ [[TMP10]], [[ENTRY:%.*]] ], [ [[TMP49]], [[BB11_I_I]] ]
+; IC-NEXT: [[TMP50:%.*]] = icmp sgt i32 [[__TRIP_COUNT_0_I_I]], 0
+; IC-NEXT: br i1 [[TMP50]], label [[BB_I_I:%.*]], label [[BB13_I_I:%.*]]
+; IC: bb13.i.i:
+; IC-NEXT: [[TMP51:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__LAST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: [[TMP52:%.*]] = load i32*, i32** [[TMP51]], align 8
+; IC-NEXT: [[TMP53:%.*]] = ptrtoint i32* [[TMP52]] to i32
+; IC-NEXT: [[TMP54:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: [[TMP55:%.*]] = load i32*, i32** [[TMP54]], align 8
+; IC-NEXT: [[TMP56:%.*]] = ptrtoint i32* [[TMP55]] to i32
+; IC-NEXT: [[TMP57:%.*]] = sub i32 [[TMP53]], [[TMP56]]
+; IC-NEXT: [[TMP58:%.*]] = ashr i32 [[TMP57]], 2
+; IC-NEXT: switch i32 [[TMP58]], label [[BB26_I_I:%.*]] [
+; IC-NEXT: i32 1, label [[BB22_I_I:%.*]]
+; IC-NEXT: i32 2, label [[BB18_I_I:%.*]]
+; IC-NEXT: i32 3, label [[BB14_I_I:%.*]]
+; IC-NEXT: ]
+; IC: bb14.i.i:
+; IC-NEXT: [[TMP59:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: [[TMP60:%.*]] = load i32*, i32** [[TMP59]], align 8
+; IC-NEXT: [[TMP61:%.*]] = load i32, i32* [[TMP60]], align 4
+; IC-NEXT: [[TMP62:%.*]] = load i32, i32* [[TMP0]], align 4
+; IC-NEXT: [[TMP63:%.*]] = icmp eq i32 [[TMP61]], [[TMP62]]
+; IC-NEXT: br i1 [[TMP63]], label [[BB16_I_I:%.*]], label [[BB17_I_I:%.*]]
+; IC: bb16.i.i:
+; IC-NEXT: [[TMP64:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: [[TMP65:%.*]] = load i32*, i32** [[TMP64]], align 8
+; IC-NEXT: br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]]
+; IC: bb17.i.i:
+; IC-NEXT: [[TMP66:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: [[TMP67:%.*]] = load i32*, i32** [[TMP66]], align 8
+; IC-NEXT: [[TMP68:%.*]] = getelementptr i32, i32* [[TMP67]], i32 1
+; IC-NEXT: [[TMP69:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: store i32* [[TMP68]], i32** [[TMP69]], align 8
+; IC-NEXT: br label [[BB18_I_I]]
+; IC: bb18.i.i:
+; IC-NEXT: [[TMP70:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: [[TMP71:%.*]] = load i32*, i32** [[TMP70]], align 8
+; IC-NEXT: [[TMP72:%.*]] = load i32, i32* [[TMP71]], align 4
+; IC-NEXT: [[TMP73:%.*]] = load i32, i32* [[TMP0]], align 4
+; IC-NEXT: [[TMP74:%.*]] = icmp eq i32 [[TMP72]], [[TMP73]]
+; IC-NEXT: br i1 [[TMP74]], label [[BB20_I_I:%.*]], label [[BB21_I_I:%.*]]
+; IC: bb20.i.i:
+; IC-NEXT: [[TMP75:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: [[TMP76:%.*]] = load i32*, i32** [[TMP75]], align 8
+; IC-NEXT: br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]]
+; IC: bb21.i.i:
+; IC-NEXT: [[TMP77:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: [[TMP78:%.*]] = load i32*, i32** [[TMP77]], align 8
+; IC-NEXT: [[TMP79:%.*]] = getelementptr i32, i32* [[TMP78]], i32 1
+; IC-NEXT: [[TMP80:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: store i32* [[TMP79]], i32** [[TMP80]], align 8
+; IC-NEXT: br label [[BB22_I_I]]
+; IC: bb22.i.i:
+; IC-NEXT: [[TMP81:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: [[TMP82:%.*]] = load i32*, i32** [[TMP81]], align 8
+; IC-NEXT: [[TMP83:%.*]] = load i32, i32* [[TMP82]], align 4
+; IC-NEXT: [[TMP84:%.*]] = load i32, i32* [[TMP0]], align 4
+; IC-NEXT: [[TMP85:%.*]] = icmp eq i32 [[TMP83]], [[TMP84]]
+; IC-NEXT: br i1 [[TMP85]], label [[BB24_I_I:%.*]], label [[BB25_I_I:%.*]]
+; IC: bb24.i.i:
+; IC-NEXT: [[TMP86:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: [[TMP87:%.*]] = load i32*, i32** [[TMP86]], align 8
+; IC-NEXT: br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]]
+; IC: bb25.i.i:
+; IC-NEXT: [[TMP88:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: [[TMP89:%.*]] = load i32*, i32** [[TMP88]], align 8
+; IC-NEXT: [[TMP90:%.*]] = getelementptr i32, i32* [[TMP89]], i32 1
+; IC-NEXT: [[TMP91:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: store i32* [[TMP90]], i32** [[TMP91]], align 8
+; IC-NEXT: br label [[BB26_I_I]]
+; IC: bb26.i.i:
+; IC-NEXT: [[TMP92:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__LAST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT: [[TMP93:%.*]] = load i32*, i32** [[TMP92]], align 8
+; IC-NEXT: br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]]
+; IC: _ZSt4findIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEiET_S7_S7_RKT0_.exit:
+; IC-NEXT: [[DOT0_0_I_I:%.*]] = phi i32* [ [[TMP93]], [[BB26_I_I]] ], [ [[TMP87]], [[BB24_I_I]] ], [ [[TMP76]], [[BB20_I_I]] ], [ [[TMP65]], [[BB16_I_I]] ], [ [[TMP44]], [[BB10_I_I]] ], [ [[TMP35]], [[BB7_I_I]] ], [ [[TMP26]], [[BB4_I_I]] ], [ [[TMP17]], [[BB1_I_I]] ]
+; IC-NEXT: br label [[RETURN:%.*]]
+; IC: return:
+; IC-NEXT: ret i32* [[DOT0_0_I_I]]
+;
+; IC_SROA-LABEL: @_Z3fooRSt6vectorIiSaIiEE(
+; IC_SROA-NEXT: entry:
+; IC_SROA-NEXT: [[TMP0:%.*]] = getelementptr %"struct.std::vector<int,std::allocator<int> >", %"struct.std::vector<int,std::allocator<int> >"* [[X:%.*]], i32 0, i32 0, i32 0, i32 1
+; IC_SROA-NEXT: [[TMP1:%.*]] = load i32*, i32** [[TMP0]], align 4
+; IC_SROA-NEXT: [[TMP2:%.*]] = getelementptr %"struct.std::vector<int,std::allocator<int> >", %"struct.std::vector<int,std::allocator<int> >"* [[X]], i32 0, i32 0, i32 0, i32 0
+; IC_SROA-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 4
+; IC_SROA-NEXT: [[TMP4:%.*]] = ptrtoint i32* [[TMP1]] to i32
+; IC_SROA-NEXT: [[TMP5:%.*]] = ptrtoint i32* [[TMP3]] to i32
+; IC_SROA-NEXT: [[TMP6:%.*]] = sub i32 [[TMP4]], [[TMP5]]
+; IC_SROA-NEXT: [[TMP7:%.*]] = ashr i32 [[TMP6]], 4
+; IC_SROA-NEXT: br label [[BB12_I_I:%.*]]
+; IC_SROA: bb.i.i:
+; IC_SROA-NEXT: [[TMP8:%.*]] = load i32, i32* [[__FIRST_ADDR_I_I_SROA_0_0:%.*]], align 4
+; IC_SROA-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], 42
+; IC_SROA-NEXT: br i1 [[TMP9]], label [[BB1_I_I:%.*]], label [[BB2_I_I:%.*]]
+; IC_SROA: bb1.i.i:
+; IC_SROA-NEXT: br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT:%.*]]
+; IC_SROA: bb2.i.i:
+; IC_SROA-NEXT: [[TMP10:%.*]] = getelementptr i32, i32* [[__FIRST_ADDR_I_I_SROA_0_0]], i32 1
+; IC_SROA-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
+; IC_SROA-NEXT: [[TMP12:%.*]] = icmp eq i32 [[TMP11]], 42
+; IC_SROA-NEXT: br i1 [[TMP12]], label [[BB4_I_I:%.*]], label [[BB5_I_I:%.*]]
+; IC_SROA: bb4.i.i:
+; IC_SROA-NEXT: br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]]
+; IC_SROA: bb5.i.i:
+; IC_SROA-NEXT: [[TMP13:%.*]] = getelementptr i32, i32* [[TMP10]], i32 1
+; IC_SROA-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
+; IC_SROA-NEXT: [[TMP15:%.*]] = icmp eq i32 [[TMP14]], 42
+; IC_SROA-NEXT: br i1 [[TMP15]], label [[BB7_I_I:%.*]], label [[BB8_I_I:%.*]]
+; IC_SROA: bb7.i.i:
+; IC_SROA-NEXT: br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]]
+; IC_SROA: bb8.i.i:
+; IC_SROA-NEXT: [[TMP16:%.*]] = getelementptr i32, i32* [[TMP13]], i32 1
+; IC_SROA-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 4
+; IC_SROA-NEXT: [[TMP18:%.*]] = icmp eq i32 [[TMP17]], 42
+; IC_SROA-NEXT: br i1 [[TMP18]], label [[BB10_I_I:%.*]], label [[BB11_I_I:%.*]]
+; IC_SROA: bb10.i.i:
+; IC_SROA-NEXT: br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]]
+; IC_SROA: bb11.i.i:
+; IC_SROA-NEXT: [[TMP19:%.*]] = getelementptr i32, i32* [[TMP16]], i32 1
+; IC_SROA-NEXT: [[TMP20:%.*]] = add i32 [[__TRIP_COUNT_0_I_I:%.*]], -1
+; IC_SROA-NEXT: br label [[BB12_I_I]]
+; IC_SROA: bb12.i.i:
+; IC_SROA-NEXT: [[__FIRST_ADDR_I_I_SROA_0_0]] = phi i32* [ [[TMP3]], [[ENTRY:%.*]] ], [ [[TMP19]], [[BB11_I_I]] ]
+; IC_SROA-NEXT: [[__TRIP_COUNT_0_I_I]] = phi i32 [ [[TMP7]], [[ENTRY]] ], [ [[TMP20]], [[BB11_I_I]] ]
+; IC_SROA-NEXT: [[TMP21:%.*]] = icmp sgt i32 [[__TRIP_COUNT_0_I_I]], 0
+; IC_SROA-NEXT: br i1 [[TMP21]], label [[BB_I_I:%.*]], label [[BB13_I_I:%.*]]
+; IC_SROA: bb13.i.i:
+; IC_SROA-NEXT: [[TMP22:%.*]] = ptrtoint i32* [[TMP1]] to i32
+; IC_SROA-NEXT: [[TMP23:%.*]] = ptrtoint i32* [[__FIRST_ADDR_I_I_SROA_0_0]] to i32
+; IC_SROA-NEXT: [[TMP24:%.*]] = sub i32 [[TMP22]], [[TMP23]]
+; IC_SROA-NEXT: [[TMP25:%.*]] = ashr i32 [[TMP24]], 2
+; IC_SROA-NEXT: switch i32 [[TMP25]], label [[BB26_I_I:%.*]] [
+; IC_SROA-NEXT: i32 1, label [[BB22_I_I:%.*]]
+; IC_SROA-NEXT: i32 2, label [[BB18_I_I:%.*]]
+; IC_SROA-NEXT: i32 3, label [[BB14_I_I:%.*]]
+; IC_SROA-NEXT: ]
+; IC_SROA: bb14.i.i:
+; IC_SROA-NEXT: [[TMP26:%.*]] = load i32, i32* [[__FIRST_ADDR_I_I_SROA_0_0]], align 4
+; IC_SROA-NEXT: [[TMP27:%.*]] = icmp eq i32 [[TMP26]], 42
+; IC_SROA-NEXT: br i1 [[TMP27]], label [[BB16_I_I:%.*]], label [[BB17_I_I:%.*]]
+; IC_SROA: bb16.i.i:
+; IC_SROA-NEXT: br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]]
+; IC_SROA: bb17.i.i:
+; IC_SROA-NEXT: [[TMP28:%.*]] = getelementptr i32, i32* [[__FIRST_ADDR_I_I_SROA_0_0]], i32 1
+; IC_SROA-NEXT: br label [[BB18_I_I]]
+; IC_SROA: bb18.i.i:
+; IC_SROA-NEXT: [[__FIRST_ADDR_I_I_SROA_0_1:%.*]] = phi i32* [ [[TMP28]], [[BB17_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_0]], [[BB13_I_I]] ]
+; IC_SROA-NEXT: [[TMP29:%.*]] = load i32, i32* [[__FIRST_ADDR_I_I_SROA_0_1]], align 4
+; IC_SROA-NEXT: [[TMP30:%.*]] = icmp eq i32 [[TMP29]], 42
+; IC_SROA-NEXT: br i1 [[TMP30]], label [[BB20_I_I:%.*]], label [[BB21_I_I:%.*]]
+; IC_SROA: bb20.i.i:
+; IC_SROA-NEXT: br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]]
+; IC_SROA: bb21.i.i:
+; IC_SROA-NEXT: [[TMP31:%.*]] = getelementptr i32, i32* [[__FIRST_ADDR_I_I_SROA_0_1]], i32 1
+; IC_SROA-NEXT: br label [[BB22_I_I]]
+; IC_SROA: bb22.i.i:
+; IC_SROA-NEXT: [[__FIRST_ADDR_I_I_SROA_0_2:%.*]] = phi i32* [ [[TMP31]], [[BB21_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_0]], [[BB13_I_I]] ]
+; IC_SROA-NEXT: [[TMP32:%.*]] = load i32, i32* [[__FIRST_ADDR_I_I_SROA_0_2]], align 4
+; IC_SROA-NEXT: [[TMP33:%.*]] = icmp eq i32 [[TMP32]], 42
+; IC_SROA-NEXT: br i1 [[TMP33]], label [[BB24_I_I:%.*]], label [[BB25_I_I:%.*]]
+; IC_SROA: bb24.i.i:
+; IC_SROA-NEXT: br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]]
+; IC_SROA: bb25.i.i:
+; IC_SROA-NEXT: [[TMP34:%.*]] = getelementptr i32, i32* [[__FIRST_ADDR_I_I_SROA_0_2]], i32 1
+; IC_SROA-NEXT: br label [[BB26_I_I]]
+; IC_SROA: bb26.i.i:
+; IC_SROA-NEXT: br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]]
+; IC_SROA: _ZSt4findIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEiET_S7_S7_RKT0_.exit:
+; IC_SROA-NEXT: [[DOT0_0_I_I:%.*]] = phi i32* [ [[TMP1]], [[BB26_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_2]], [[BB24_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_1]], [[BB20_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_0]], [[BB16_I_I]] ], [ [[TMP16]], [[BB10_I_I]] ], [ [[TMP13]], [[BB7_I_I]] ], [ [[TMP10]], [[BB4_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_0]], [[BB1_I_I]] ]
+; IC_SROA-NEXT: br label [[RETURN:%.*]]
+; IC_SROA: return:
+; IC_SROA-NEXT: ret i32* [[DOT0_0_I_I]]
+;
entry:
%0 = alloca %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"
%__first_addr.i.i = alloca %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"
@@ -179,9 +438,9 @@ bb13.i.i: ; preds = %bb12.i.i
%93 = sub i32 %89, %92
%94 = ashr i32 %93, 2
switch i32 %94, label %bb26.i.i [
- i32 1, label %bb22.i.i
- i32 2, label %bb18.i.i
- i32 3, label %bb14.i.i
+ i32 1, label %bb22.i.i
+ i32 2, label %bb18.i.i
+ i32 3, label %bb14.i.i
]
bb14.i.i: ; preds = %bb13.i.i
diff --git a/llvm/test/Transforms/InstCombine/PR30597.ll b/llvm/test/Transforms/InstCombine/PR30597.ll
index a54fd68fd07e..33b3695697de 100644
--- a/llvm/test/Transforms/InstCombine/PR30597.ll
+++ b/llvm/test/Transforms/InstCombine/PR30597.ll
@@ -23,7 +23,7 @@ entry-block:
define i64* @function(i64* noalias nocapture readonly dereferenceable(8)) {
; CHECK-LABEL: @function(
; CHECK-NEXT: entry-block:
-; CHECK-NEXT: [[LOADED:%.*]] = load i64, i64* [[TMP0:%.*]], align 8, [[RNG0:!range !.*]]
+; CHECK-NEXT: [[LOADED:%.*]] = load i64, i64* [[TMP0:%.*]], align 8, !range [[RNG0:![0-9]+]]
; CHECK-NEXT: [[INTTOPTR:%.*]] = inttoptr i64 [[LOADED]] to i64*
; CHECK-NEXT: ret i64* [[INTTOPTR]]
;
diff --git a/llvm/test/Transforms/InstCombine/apint-call-cast-target.ll b/llvm/test/Transforms/InstCombine/apint-call-cast-target.ll
index f3a66c324147..85a9f0982dfa 100644
--- a/llvm/test/Transforms/InstCombine/apint-call-cast-target.ll
+++ b/llvm/test/Transforms/InstCombine/apint-call-cast-target.ll
@@ -1,23 +1,32 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -instcombine -S | FileCheck %s
target datalayout = "e-p:32:32"
target triple = "i686-pc-linux-gnu"
-define i32 @main() {
-; CHECK-LABEL: @main(
-; CHECK: %[[call:.*]] = call i7* @ctime(i999* null)
-; CHECK: %[[cast:.*]] = ptrtoint i7* %[[call]] to i32
-; CHECK: ret i32 %[[cast]]
+declare i32 @main2()
+declare i7* @ctime2(i999*)
+
+define i7* @ctime(i999*) {
+; CHECK-LABEL: @ctime(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[I0:%.*]] = call i32 @main2()
+; CHECK-NEXT: [[TMP1:%.*]] = inttoptr i32 [[I0]] to i7*
+; CHECK-NEXT: ret i7* [[TMP1]]
+;
entry:
- %tmp = call i32 bitcast (i7* (i999*)* @ctime to i32 (i99*)*)( i99* null )
- ret i32 %tmp
+ %i0 = call i7* bitcast (i32 ()* @main2 to i7* ()*)( )
+ ret i7* %i0
}
-define i7* @ctime(i999*) {
-; CHECK-LABEL: define i7* @ctime(
-; CHECK: %[[call:.*]] = call i32 @main()
-; CHECK: %[[cast:.*]] = inttoptr i32 %[[call]] to i7*
+define i32 @main() {
+; CHECK-LABEL: @main(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[I1:%.*]] = call i7* @ctime2(i999* null)
+; CHECK-NEXT: [[TMP0:%.*]] = ptrtoint i7* [[I1]] to i32
+; CHECK-NEXT: ret i32 [[TMP0]]
+;
entry:
- %tmp = call i7* bitcast (i32 ()* @main to i7* ()*)( )
- ret i7* %tmp
+ %i1 = call i32 bitcast (i7* (i999*)* @ctime2 to i32 (i99*)*)( i99* null )
+ ret i32 %i1
}
diff --git a/llvm/test/Transforms/InstCombine/cast_ptr.ll b/llvm/test/Transforms/InstCombine/cast_ptr.ll
index 831d1b4de2f5..1b46e3666c9d 100644
--- a/llvm/test/Transforms/InstCombine/cast_ptr.ll
+++ b/llvm/test/Transforms/InstCombine/cast_ptr.ll
@@ -127,8 +127,8 @@ define i1 @test4_as2(i16 %A) {
; Pulling the cast out of the load allows us to eliminate the load, and then
; the whole array.
- %op = type { float }
- %unop = type { i32 }
+ %op = type { float }
+ %unop = type { i32 }
@Array = internal constant [1 x %op* (%op*)*] [ %op* (%op*)* @foo ]
declare %op* @foo(%op* %X)
diff --git a/llvm/test/Transforms/InstCombine/icmp.ll b/llvm/test/Transforms/InstCombine/icmp.ll
index 5e6bed4e280f..5f48684d04a4 100644
--- a/llvm/test/Transforms/InstCombine/icmp.ll
+++ b/llvm/test/Transforms/InstCombine/icmp.ll
@@ -3053,7 +3053,7 @@ define i1 @icmp_sle_zero_add_nsw(i32 %a) {
define zeroext i1 @icmp_cmpxchg_strong(i32* %sc, i32 %old_val, i32 %new_val) {
; CHECK-LABEL: @icmp_cmpxchg_strong(
-; CHECK-NEXT: [[XCHG:%.*]] = cmpxchg i32* [[SC:%.*]], i32 [[OLD_VAL:%.*]], i32 [[NEW_VAL:%.*]] seq_cst seq_cst
+; CHECK-NEXT: [[XCHG:%.*]] = cmpxchg i32* [[SC:%.*]], i32 [[OLD_VAL:%.*]], i32 [[NEW_VAL:%.*]] seq_cst seq_cst, align 4
; CHECK-NEXT: [[ICMP:%.*]] = extractvalue { i32, i1 } [[XCHG]], 1
; CHECK-NEXT: ret i1 [[ICMP]]
;
diff --git a/llvm/test/Transforms/InstCombine/indexed-gep-compares.ll b/llvm/test/Transforms/InstCombine/indexed-gep-compares.ll
index 859fd6437bb3..2ca2a45d5c3f 100644
--- a/llvm/test/Transforms/InstCombine/indexed-gep-compares.ll
+++ b/llvm/test/Transforms/InstCombine/indexed-gep-compares.ll
@@ -1,8 +1,21 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -instcombine -S < %s | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
define i32 *@test1(i32* %A, i32 %Offset) {
+; CHECK-LABEL: @test1(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[BB:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[RHS_IDX:%.*]] = phi i32 [ [[RHS_ADD:%.*]], [[BB]] ], [ [[OFFSET:%.*]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[RHS_ADD]] = add nsw i32 [[RHS_IDX]], 1
+; CHECK-NEXT: [[COND:%.*]] = icmp sgt i32 [[RHS_IDX]], 100
+; CHECK-NEXT: br i1 [[COND]], label [[BB2:%.*]], label [[BB]]
+; CHECK: bb2:
+; CHECK-NEXT: [[RHS_PTR:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i32 [[RHS_IDX]]
+; CHECK-NEXT: ret i32* [[RHS_PTR]]
+;
entry:
%tmp = getelementptr inbounds i32, i32* %A, i32 %Offset
br label %bb
@@ -17,16 +30,22 @@ bb:
bb2:
ret i32* %RHS
-; CHECK-LABEL: @test1(
-; CHECK: %[[INDEX:[0-9A-Za-z.]+]] = phi i32 [ %[[ADD:[0-9A-Za-z.]+]], %bb ], [ %Offset, %entry ]
-; CHECK: %[[ADD]] = add nsw i32 %[[INDEX]], 1
-; CHECK: %cond = icmp sgt i32 %[[INDEX]], 100
-; CHECK: br i1 %cond, label %bb2, label %bb
-; CHECK: %[[PTR:[0-9A-Za-z.]+]] = getelementptr inbounds i32, i32* %A, i32 %[[INDEX]]
-; CHECK: ret i32* %[[PTR]]
}
define i32 *@test2(i32 %A, i32 %Offset) {
+; CHECK-LABEL: @test2(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[BB:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[RHS_IDX:%.*]] = phi i32 [ [[RHS_ADD:%.*]], [[BB]] ], [ [[OFFSET:%.*]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[RHS_ADD]] = add nsw i32 [[RHS_IDX]], 1
+; CHECK-NEXT: [[COND:%.*]] = icmp sgt i32 [[RHS_IDX]], 100
+; CHECK-NEXT: br i1 [[COND]], label [[BB2:%.*]], label [[BB]]
+; CHECK: bb2:
+; CHECK-NEXT: [[RHSTO_PTR:%.*]] = inttoptr i32 [[A:%.*]] to i32*
+; CHECK-NEXT: [[RHS_PTR:%.*]] = getelementptr inbounds i32, i32* [[RHSTO_PTR]], i32 [[RHS_IDX]]
+; CHECK-NEXT: ret i32* [[RHS_PTR]]
+;
entry:
%A.ptr = inttoptr i32 %A to i32*
%tmp = getelementptr inbounds i32, i32* %A.ptr, i32 %Offset
@@ -44,18 +63,23 @@ bb:
bb2:
ret i32* %RHS
-; CHECK-LABEL: @test2(
-; CHECK: %[[INDEX:[0-9A-Za-z.]+]] = phi i32 [ %[[ADD:[0-9A-Za-z.]+]], %bb ], [ %Offset, %entry ]
-; CHECK: %[[ADD]] = add nsw i32 %[[INDEX]], 1
-; CHECK: %cond = icmp sgt i32 %[[INDEX]], 100
-; CHECK: br i1 %cond, label %bb2, label %bb
-; CHECK: %[[TOPTR:[0-9A-Za-z.]+]] = inttoptr i32 %[[ADD:[0-9A-Za-z.]+]] to i32*
-; CHECK: %[[PTR:[0-9A-Za-z.]+]] = getelementptr inbounds i32, i32* %[[TOPTR]], i32 %[[INDEX]]
-; CHECK: ret i32* %[[PTR]]
}
; Perform the transformation only if we know that the GEPs used are inbounds.
define i32 *@test3(i32* %A, i32 %Offset) {
+; CHECK-LABEL: @test3(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP:%.*]] = getelementptr i32, i32* [[A:%.*]], i32 [[OFFSET:%.*]]
+; CHECK-NEXT: br label [[BB:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[RHS:%.*]] = phi i32* [ [[RHS_NEXT:%.*]], [[BB]] ], [ [[TMP]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[LHS:%.*]] = getelementptr i32, i32* [[A]], i32 100
+; CHECK-NEXT: [[RHS_NEXT]] = getelementptr i32, i32* [[RHS]], i32 1
+; CHECK-NEXT: [[COND:%.*]] = icmp ult i32* [[LHS]], [[RHS]]
+; CHECK-NEXT: br i1 [[COND]], label [[BB2:%.*]], label [[BB]]
+; CHECK: bb2:
+; CHECK-NEXT: ret i32* [[RHS]]
+;
entry:
%tmp = getelementptr i32, i32* %A, i32 %Offset
br label %bb
@@ -70,14 +94,26 @@ bb:
bb2:
ret i32* %RHS
-; CHECK-LABEL: @test3(
-; CHECK-NOT: %cond = icmp sgt i32 %{{[0-9A-Za-z.]+}}, 100
}
; An inttoptr that requires an extension or truncation will be opaque when determining
; the base pointer. In this case we can still perform the transformation by considering
; A.ptr as being the base pointer.
define i32 *@test4(i16 %A, i32 %Offset) {
+; CHECK-LABEL: @test4(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[BB:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[RHS_IDX:%.*]] = phi i32 [ [[RHS_ADD:%.*]], [[BB]] ], [ [[OFFSET:%.*]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[RHS_ADD]] = add nsw i32 [[RHS_IDX]], 1
+; CHECK-NEXT: [[COND:%.*]] = icmp sgt i32 [[RHS_IDX]], 100
+; CHECK-NEXT: br i1 [[COND]], label [[BB2:%.*]], label [[BB]]
+; CHECK: bb2:
+; CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[A:%.*]] to i32
+; CHECK-NEXT: [[RHSTO_PTR:%.*]] = inttoptr i32 [[TMP0]] to i32*
+; CHECK-NEXT: [[RHS_PTR:%.*]] = getelementptr inbounds i32, i32* [[RHSTO_PTR]], i32 [[RHS_IDX]]
+; CHECK-NEXT: ret i32* [[RHS_PTR]]
+;
entry:
%A.ptr = inttoptr i16 %A to i32*
%tmp = getelementptr inbounds i32, i32* %A.ptr, i32 %Offset
@@ -95,15 +131,32 @@ bb:
bb2:
ret i32* %RHS
-; CHECK-LABEL: @test4(
-; CHECK: %cond = icmp sgt i32 %{{[0-9A-Za-z.]+}}, 100
}
declare i32* @fun_ptr()
define i32 *@test5(i32 %Offset) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+; CHECK-LABEL: @test5(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[A:%.*]] = invoke i32* @fun_ptr()
+; CHECK-NEXT: to label [[CONT:%.*]] unwind label [[LPAD:%.*]]
+; CHECK: cont:
+; CHECK-NEXT: br label [[BB:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[RHS_IDX:%.*]] = phi i32 [ [[RHS_ADD:%.*]], [[BB]] ], [ [[OFFSET:%.*]], [[CONT]] ]
+; CHECK-NEXT: [[RHS_ADD]] = add nsw i32 [[RHS_IDX]], 1
+; CHECK-NEXT: [[COND:%.*]] = icmp sgt i32 [[RHS_IDX]], 100
+; CHECK-NEXT: br i1 [[COND]], label [[BB2:%.*]], label [[BB]]
+; CHECK: bb2:
+; CHECK-NEXT: [[RHS_PTR:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[RHS_IDX]]
+; CHECK-NEXT: ret i32* [[RHS_PTR]]
+; CHECK: lpad:
+; CHECK-NEXT: [[L:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: cleanup
+; CHECK-NEXT: ret i32* null
+;
entry:
- %A = invoke i32 *@fun_ptr() to label %cont unwind label %lpad
+ %A = invoke i32 *@fun_ptr() to label %cont unwind label %lpad
cont:
%tmp = getelementptr inbounds i32, i32* %A, i32 %Offset
@@ -123,20 +176,33 @@ lpad:
%l = landingpad { i8*, i32 } cleanup
ret i32* null
-; CHECK-LABEL: @test5(
-; CHECK: %[[INDEX:[0-9A-Za-z.]+]] = phi i32 [ %[[ADD:[0-9A-Za-z.]+]], %bb ], [ %Offset, %cont ]
-; CHECK: %[[ADD]] = add nsw i32 %[[INDEX]], 1
-; CHECK: %cond = icmp sgt i32 %[[INDEX]], 100
-; CHECK: br i1 %cond, label %bb2, label %bb
-; CHECK: %[[PTR:[0-9A-Za-z.]+]] = getelementptr inbounds i32, i32* %A, i32 %[[INDEX]]
-; CHECK: ret i32* %[[PTR]]
}
declare i32 @fun_i32()
define i32 *@test6(i32 %Offset) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+; CHECK-LABEL: @test6(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[A:%.*]] = invoke i32 @fun_i32()
+; CHECK-NEXT: to label [[CONT:%.*]] unwind label [[LPAD:%.*]]
+; CHECK: cont:
+; CHECK-NEXT: br label [[BB:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[RHS_IDX:%.*]] = phi i32 [ [[RHS_ADD:%.*]], [[BB]] ], [ [[OFFSET:%.*]], [[CONT]] ]
+; CHECK-NEXT: [[RHS_ADD]] = add nsw i32 [[RHS_IDX]], 1
+; CHECK-NEXT: [[COND:%.*]] = icmp sgt i32 [[RHS_IDX]], 100
+; CHECK-NEXT: br i1 [[COND]], label [[BB2:%.*]], label [[BB]]
+; CHECK: bb2:
+; CHECK-NEXT: [[RHSTO_PTR:%.*]] = inttoptr i32 [[A]] to i32*
+; CHECK-NEXT: [[RHS_PTR:%.*]] = getelementptr inbounds i32, i32* [[RHSTO_PTR]], i32 [[RHS_IDX]]
+; CHECK-NEXT: ret i32* [[RHS_PTR]]
+; CHECK: lpad:
+; CHECK-NEXT: [[L:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: cleanup
+; CHECK-NEXT: ret i32* null
+;
entry:
- %A = invoke i32 @fun_i32() to label %cont unwind label %lpad
+ %A = invoke i32 @fun_i32() to label %cont unwind label %lpad
cont:
%A.ptr = inttoptr i32 %A to i32*
@@ -157,19 +223,20 @@ lpad:
%l = landingpad { i8*, i32 } cleanup
ret i32* null
-; CHECK-LABEL: @test6(
-; CHECK: %[[INDEX:[0-9A-Za-z.]+]] = phi i32 [ %[[ADD:[0-9A-Za-z.]+]], %bb ], [ %Offset, %cont ]
-; CHECK: %[[ADD]] = add nsw i32 %[[INDEX]], 1
-; CHECK: %cond = icmp sgt i32 %[[INDEX]], 100
-; CHECK: br i1 %cond, label %bb2, label %bb
-; CHECK: %[[TOPTR:[0-9A-Za-z.]+]] = inttoptr i32 %[[ADD:[0-9A-Za-z.]+]] to i32*
-; CHECK: %[[PTR:[0-9A-Za-z.]+]] = getelementptr inbounds i32, i32* %[[TOPTR]], i32 %[[INDEX]]
-; CHECK: ret i32* %[[PTR]]
}
@pr30402 = constant i64 3
define i1 @test7() {
+; CHECK-LABEL: @test7(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[BB7:%.*]]
+; CHECK: bb7:
+; CHECK-NEXT: [[CMP:%.*]] = phi i1 [ true, [[BB7]] ], [ false, [[ENTRY:%.*]] ]
+; CHECK-NEXT: br i1 [[CMP]], label [[BB10:%.*]], label [[BB7]]
+; CHECK: bb10:
+; CHECK-NEXT: ret i1 [[CMP]]
+;
entry:
br label %bb7
@@ -181,26 +248,35 @@ bb7: ; preds = %bb10, %entry-block
bb10:
ret i1 %cmp
}
-; CHECK-LABEL: @test7(
-; CHECK: %[[cmp:.*]] = phi i1 [ true, %bb7 ], [ false, %entry ]
-; CHECK: ret i1 %[[cmp]]
declare i32 @__gxx_personality_v0(...)
define i1 @test8(i64* %in, i64 %offset) {
+; CHECK-LABEL: @test8(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[LD:%.*]] = load i64, i64* [[IN:%.*]], align 8
+; CHECK-NEXT: [[TMP0:%.*]] = trunc i64 [[LD]] to i32
+; CHECK-NEXT: [[CASTI8:%.*]] = inttoptr i32 [[TMP0]] to i8*
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[OFFSET:%.*]] to i32
+; CHECK-NEXT: [[GEPI8:%.*]] = getelementptr inbounds i8, i8* [[CASTI8]], i32 [[TMP1]]
+; CHECK-NEXT: [[CAST:%.*]] = bitcast i8* [[GEPI8]] to i32**
+; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[LD]] to i32
+; CHECK-NEXT: [[PTRCAST:%.*]] = inttoptr i32 [[TMP2]] to i32**
+; CHECK-NEXT: [[GEPI32:%.*]] = getelementptr inbounds i32*, i32** [[PTRCAST]], i32 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32** [[GEPI32]], [[CAST]]
+; CHECK-NEXT: ret i1 [[CMP]]
+;
entry:
- %ld = load i64, i64* %in, align 8
- %casti8 = inttoptr i64 %ld to i8*
- %gepi8 = getelementptr inbounds i8, i8* %casti8, i64 %offset
- %cast = bitcast i8* %gepi8 to i32**
- %ptrcast = inttoptr i64 %ld to i32**
- %gepi32 = getelementptr inbounds i32*, i32** %ptrcast, i64 1
- %cmp = icmp eq i32** %gepi32, %cast
- ret i1 %cmp
+ %ld = load i64, i64* %in, align 8
+ %casti8 = inttoptr i64 %ld to i8*
+ %gepi8 = getelementptr inbounds i8, i8* %casti8, i64 %offset
+ %cast = bitcast i8* %gepi8 to i32**
+ %ptrcast = inttoptr i64 %ld to i32**
+ %gepi32 = getelementptr inbounds i32*, i32** %ptrcast, i64 1
+ %cmp = icmp eq i32** %gepi32, %cast
+ ret i1 %cmp
-; CHECK-LABEL: @test8(
-; CHECK-NOT: icmp eq i32 %{{[0-9A-Za-z.]+}}, 1
}
diff --git a/llvm/test/Transforms/InstCombine/intptr1.ll b/llvm/test/Transforms/InstCombine/intptr1.ll
index 71cfb36bb328..42fa9bf8b44d 100644
--- a/llvm/test/Transforms/InstCombine/intptr1.ll
+++ b/llvm/test/Transforms/InstCombine/intptr1.ll
@@ -13,8 +13,8 @@ define void @test1(float* %a, float* readnone %a_end, i64* %b.i64) {
; CHECK: for.body:
; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi float* [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ]
; CHECK-NEXT: [[B_ADDR_02_PTR:%.*]] = phi float* [ [[ADD:%.*]], [[FOR_BODY]] ], [ [[B_PTR]], [[FOR_BODY_PREHEADER]] ]
-; CHECK-NEXT: [[TMP1:%.*]] = load float, float* [[B_ADDR_02_PTR]], align 4
-; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[TMP1]], 4.200000e+01
+; CHECK-NEXT: [[I1:%.*]] = load float, float* [[B_ADDR_02_PTR]], align 4
+; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[I1]], 4.200000e+01
; CHECK-NEXT: store float [[MUL_I]], float* [[A_ADDR_03]], align 4
; CHECK-NEXT: [[ADD]] = getelementptr inbounds float, float* [[B_ADDR_02_PTR]], i64 1
; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds float, float* [[A_ADDR_03]], i64 1
@@ -37,8 +37,8 @@ for.body: ; preds = %for.body, %for.body
%tmp = inttoptr i64 %b.addr.02 to float*
- %tmp1 = load float, float* %tmp, align 4
- %mul.i = fmul float %tmp1, 4.200000e+01
+ %i1 = load float, float* %tmp, align 4
+ %mul.i = fmul float %i1, 4.200000e+01
store float %mul.i, float* %a.addr.03, align 4
%add = getelementptr inbounds float, float* %tmp, i64 1
%add.int = ptrtoint float* %add to i64
@@ -65,8 +65,8 @@ define void @test1_neg(float* %a, float* readnone %a_end, i64* %b.i64) {
; CHECK-NEXT: [[PTRCMP:%.*]] = icmp ult float* [[TMP]], [[A_END]]
; CHECK-NEXT: br i1 [[PTRCMP]], label [[FOR_END]], label [[BB]]
; CHECK: bb:
-; CHECK-NEXT: [[TMP1:%.*]] = load float, float* [[A]], align 4
-; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[TMP1]], 4.200000e+01
+; CHECK-NEXT: [[I1:%.*]] = load float, float* [[A]], align 4
+; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[I1]], 4.200000e+01
; CHECK-NEXT: store float [[MUL_I]], float* [[A_ADDR_03]], align 4
; CHECK-NEXT: [[ADD:%.*]] = getelementptr inbounds float, float* [[A]], i64 1
; CHECK-NEXT: [[ADD_INT]] = ptrtoint float* [[ADD]] to i64
@@ -94,8 +94,8 @@ for.body: ; preds = %for.body, %for.body
br i1 %ptrcmp, label %for.end, label %bb
bb:
- %tmp1 = load float, float* %a, align 4
- %mul.i = fmul float %tmp1, 4.200000e+01
+ %i1 = load float, float* %a, align 4
+ %mul.i = fmul float %i1, 4.200000e+01
store float %mul.i, float* %a.addr.03, align 4
%add = getelementptr inbounds float, float* %a, i64 1
%add.int = ptrtoint float* %add to i64
@@ -121,8 +121,8 @@ define void @test2(float* %a, float* readnone %a_end, float** %b.float) {
; CHECK: for.body:
; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi float* [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ]
; CHECK-NEXT: [[B_ADDR_02_PTR:%.*]] = phi float* [ [[ADD:%.*]], [[FOR_BODY]] ], [ [[B_PTR]], [[FOR_BODY_PREHEADER]] ]
-; CHECK-NEXT: [[TMP1:%.*]] = load float, float* [[B_ADDR_02_PTR]], align 4
-; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[TMP1]], 4.200000e+01
+; CHECK-NEXT: [[I1:%.*]] = load float, float* [[B_ADDR_02_PTR]], align 4
+; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[I1]], 4.200000e+01
; CHECK-NEXT: store float [[MUL_I]], float* [[A_ADDR_03]], align 4
; CHECK-NEXT: [[ADD]] = getelementptr inbounds float, float* [[B_ADDR_02_PTR]], i64 1
; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds float, float* [[A_ADDR_03]], i64 1
@@ -146,8 +146,8 @@ for.body: ; preds = %for.body, %for.body
%tmp = inttoptr i64 %b.addr.02 to float*
- %tmp1 = load float, float* %tmp, align 4
- %mul.i = fmul float %tmp1, 4.200000e+01
+ %i1 = load float, float* %tmp, align 4
+ %mul.i = fmul float %i1, 4.200000e+01
store float %mul.i, float* %a.addr.03, align 4
%add = getelementptr inbounds float, float* %tmp, i64 1
%add.int = ptrtoint float* %add to i64
@@ -173,8 +173,8 @@ define void @test3(float* %a, float* readnone %a_end, i8** %b.i8p) {
; CHECK: for.body:
; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi float* [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ]
; CHECK-NEXT: [[B_ADDR_02_PTR:%.*]] = phi float* [ [[ADD:%.*]], [[FOR_BODY]] ], [ [[B_PTR]], [[FOR_BODY_PREHEADER]] ]
-; CHECK-NEXT: [[TMP1:%.*]] = load float, float* [[B_ADDR_02_PTR]], align 4
-; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[TMP1]], 4.200000e+01
+; CHECK-NEXT: [[I1:%.*]] = load float, float* [[B_ADDR_02_PTR]], align 4
+; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[I1]], 4.200000e+01
; CHECK-NEXT: store float [[MUL_I]], float* [[A_ADDR_03]], align 4
; CHECK-NEXT: [[ADD]] = getelementptr inbounds float, float* [[B_ADDR_02_PTR]], i64 1
; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds float, float* [[A_ADDR_03]], i64 1
@@ -198,8 +198,8 @@ for.body: ; preds = %for.body, %for.body
%tmp = inttoptr i64 %b.addr.02 to float*
- %tmp1 = load float, float* %tmp, align 4
- %mul.i = fmul float %tmp1, 4.200000e+01
+ %i1 = load float, float* %tmp, align 4
+ %mul.i = fmul float %i1, 4.200000e+01
store float %mul.i, float* %a.addr.03, align 4
%add = getelementptr inbounds float, float* %tmp, i64 1
%add.int = ptrtoint float* %add to i64
@@ -223,8 +223,8 @@ define void @test4(float* %a, float* readnone %a_end, float** %b.float) {
; CHECK: for.body:
; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi float* [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ]
; CHECK-NEXT: [[B_ADDR_02_IN:%.*]] = phi float* [ [[ADD:%.*]], [[FOR_BODY]] ], [ [[B_F]], [[FOR_BODY_PREHEADER]] ]
-; CHECK-NEXT: [[TMP1:%.*]] = load float, float* [[B_ADDR_02_IN]], align 4
-; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[TMP1]], 4.200000e+01
+; CHECK-NEXT: [[I1:%.*]] = load float, float* [[B_ADDR_02_IN]], align 4
+; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[I1]], 4.200000e+01
; CHECK-NEXT: store float [[MUL_I]], float* [[A_ADDR_03]], align 4
; CHECK-NEXT: [[ADD]] = getelementptr inbounds float, float* [[B_ADDR_02_IN]], i64 1
; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds float, float* [[A_ADDR_03]], i64 1
@@ -246,8 +246,8 @@ for.body: ; preds = %for.body, %for.body
%a.addr.03 = phi float* [ %incdec.ptr, %for.body ], [ %a, %for.body.preheader ]
%b.addr.02 = phi i64 [ %add.int, %for.body ], [ %b, %for.body.preheader ]
%tmp = inttoptr i64 %b.addr.02 to float*
- %tmp1 = load float, float* %tmp, align 4
- %mul.i = fmul float %tmp1, 4.200000e+01
+ %i1 = load float, float* %tmp, align 4
+ %mul.i = fmul float %i1, 4.200000e+01
store float %mul.i, float* %a.addr.03, align 4
%add = getelementptr inbounds float, float* %tmp, i64 1
%add.int = ptrtoint float* %add to i64
diff --git a/llvm/test/Transforms/InstCombine/intptr3.ll b/llvm/test/Transforms/InstCombine/intptr3.ll
index 72b81ce350f7..84a0cb922979 100644
--- a/llvm/test/Transforms/InstCombine/intptr3.ll
+++ b/llvm/test/Transforms/InstCombine/intptr3.ll
@@ -1,6 +1,27 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -instcombine -S | FileCheck %s
define void @test(float* %a, float* readnone %a_end, i64 %b) unnamed_addr {
+; CHECK-LABEL: @test(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ult float* [[A:%.*]], [[A_END:%.*]]
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: [[B_FLOAT:%.*]] = inttoptr i64 [[B:%.*]] to float*
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi float* [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT: [[B_ADDR_FLOAT:%.*]] = phi float* [ [[B_ADDR_FLOAT_INC:%.*]], [[FOR_BODY]] ], [ [[B_FLOAT]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT: [[L:%.*]] = load float, float* [[B_ADDR_FLOAT]], align 4
+; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[L]], 4.200000e+01
+; CHECK-NEXT: store float [[MUL_I]], float* [[A_ADDR_03]], align 4
+; CHECK-NEXT: [[B_ADDR_FLOAT_INC]] = getelementptr inbounds float, float* [[B_ADDR_FLOAT]], i64 1
+; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds float, float* [[A_ADDR_03]], i64 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult float* [[INCDEC_PTR]], [[A_END]]
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
%cmp1 = icmp ult float* %a, %a_end
br i1 %cmp1, label %for.body.preheader, label %for.end
@@ -13,21 +34,13 @@ for.body: ; preds = %for.body.preheader,
%a.addr.03 = phi float* [ %incdec.ptr, %for.body ], [ %a, %for.body.preheader ]
%b.addr.float = phi float* [ %b.addr.float.inc, %for.body ], [ %b.float, %for.body.preheader ]
%b.addr.i64 = phi i64 [ %b.addr.i64.inc, %for.body ], [ %b, %for.body.preheader ]
-; CHECK: %a.addr.03 = phi float* [ %incdec.ptr, %for.body ], [ %a, %for.body.preheader ]
-; CHECK-NEXT: %b.addr.float = phi float* [ %b.addr.float.inc, %for.body ], [ %b.float, %for.body.preheader ]
-; CHECK-NEXT: = load float
- %l = load float, float* %b.addr.float, align 4
+ %l = load float, float* %b.addr.float, align 4
%mul.i = fmul float %l, 4.200000e+01
store float %mul.i, float* %a.addr.03, align 4
-; CHECK: store float
%b.addr.float.2 = inttoptr i64 %b.addr.i64 to float*
-; CHECK-NOT: inttoptr
%b.addr.float.inc = getelementptr inbounds float, float* %b.addr.float.2, i64 1
-; CHECK: %b.addr.float.inc =
%b.addr.i64.inc = ptrtoint float* %b.addr.float.inc to i64
-; CHECK-NOT: ptrtoint
%incdec.ptr = getelementptr inbounds float, float* %a.addr.03, i64 1
-; CHECK: %incdec.ptr =
%cmp = icmp ult float* %incdec.ptr, %a_end
br i1 %cmp, label %for.body, label %for.end
diff --git a/llvm/test/Transforms/InstCombine/intptr7.ll b/llvm/test/Transforms/InstCombine/intptr7.ll
index 1e83bacd65bb..ee5825f2f988 100644
--- a/llvm/test/Transforms/InstCombine/intptr7.ll
+++ b/llvm/test/Transforms/InstCombine/intptr7.ll
@@ -1,7 +1,25 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -instcombine -S | FileCheck %s
define void @matching_phi(i64 %a, float* %b, i1 %cond) {
-; CHECK-LABEL: @matching_phi
+; CHECK-LABEL: @matching_phi(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[ADD_INT:%.*]] = add i64 [[A:%.*]], 1
+; CHECK-NEXT: [[ADD:%.*]] = inttoptr i64 [[ADD_INT]] to float*
+; CHECK-NEXT: br i1 [[COND:%.*]], label [[BBB:%.*]], label [[A:%.*]]
+; CHECK: A:
+; CHECK-NEXT: [[ADDB:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 2
+; CHECK-NEXT: br label [[C:%.*]]
+; CHECK: Bbb:
+; CHECK-NEXT: store float 1.000000e+01, float* [[ADD]], align 4
+; CHECK-NEXT: br label [[C]]
+; CHECK: C:
+; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi float* [ [[ADDB]], [[A]] ], [ [[ADD]], [[BBB]] ]
+; CHECK-NEXT: [[I1:%.*]] = load float, float* [[A_ADDR_03]], align 4
+; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[I1]], 4.200000e+01
+; CHECK-NEXT: store float [[MUL_I]], float* [[A_ADDR_03]], align 4
+; CHECK-NEXT: ret void
+;
entry:
%cmp1 = icmp eq i1 %cond, 0
%add.int = add i64 %a, 1
@@ -9,27 +27,43 @@ entry:
%addb = getelementptr inbounds float, float* %b, i64 2
%addb.int = ptrtoint float* %addb to i64
- br i1 %cmp1, label %A, label %B
+ br i1 %cmp1, label %A, label %Bbb
A:
br label %C
-B:
+Bbb:
store float 1.0e+01, float* %add, align 4
br label %C
C:
- %a.addr.03 = phi float* [ %addb, %A ], [ %add, %B ]
- %b.addr.02 = phi i64 [ %addb.int, %A ], [ %add.int, %B ]
- %tmp = inttoptr i64 %b.addr.02 to float*
-; CHECK: %a.addr.03 = phi
-; CHECK-NEXT: = load
- %tmp1 = load float, float* %tmp, align 4
- %mul.i = fmul float %tmp1, 4.200000e+01
+ %a.addr.03 = phi float* [ %addb, %A ], [ %add, %Bbb ]
+ %b.addr.02 = phi i64 [ %addb.int, %A ], [ %add.int, %Bbb ]
+ %i0 = inttoptr i64 %b.addr.02 to float*
+ %i1 = load float, float* %i0, align 4
+ %mul.i = fmul float %i1, 4.200000e+01
store float %mul.i, float* %a.addr.03, align 4
ret void
}
define void @no_matching_phi(i64 %a, float* %b, i1 %cond) {
-; CHECK-LABEL: @no_matching_phi
+; CHECK-LABEL: @no_matching_phi(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[ADD_INT:%.*]] = add i64 [[A:%.*]], 1
+; CHECK-NEXT: [[ADD:%.*]] = inttoptr i64 [[ADD_INT]] to float*
+; CHECK-NEXT: [[ADDB:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 2
+; CHECK-NEXT: br i1 [[COND:%.*]], label [[B:%.*]], label [[A:%.*]]
+; CHECK: A:
+; CHECK-NEXT: br label [[C:%.*]]
+; CHECK: B:
+; CHECK-NEXT: store float 1.000000e+01, float* [[ADD]], align 4
+; CHECK-NEXT: br label [[C]]
+; CHECK: C:
+; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi float* [ [[ADDB]], [[A]] ], [ [[ADD]], [[B]] ]
+; CHECK-NEXT: [[B_ADDR_02_PTR:%.*]] = phi float* [ [[ADD]], [[A]] ], [ [[ADDB]], [[B]] ]
+; CHECK-NEXT: [[I1:%.*]] = load float, float* [[B_ADDR_02_PTR]], align 4
+; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[I1]], 4.200000e+01
+; CHECK-NEXT: store float [[MUL_I]], float* [[A_ADDR_03]], align 4
+; CHECK-NEXT: ret void
+;
entry:
%cmp1 = icmp eq i1 %cond, 0
%add.int = add i64 %a, 1
@@ -47,12 +81,9 @@ B:
C:
%a.addr.03 = phi float* [ %addb, %A ], [ %add, %B ]
%b.addr.02 = phi i64 [ %addb.int, %B ], [ %add.int, %A ]
- %tmp = inttoptr i64 %b.addr.02 to float*
- %tmp1 = load float, float* %tmp, align 4
-; CHECK: %a.addr.03 = phi
-; CHECK-NEXT: %b.addr.02.ptr = phi
-; CHECK-NEXT: = load
- %mul.i = fmul float %tmp1, 4.200000e+01
+ %i0 = inttoptr i64 %b.addr.02 to float*
+ %i1 = load float, float* %i0, align 4
+ %mul.i = fmul float %i1, 4.200000e+01
store float %mul.i, float* %a.addr.03, align 4
ret void
}
diff --git a/llvm/test/Transforms/InstCombine/multi-size-address-space-pointer.ll b/llvm/test/Transforms/InstCombine/multi-size-address-space-pointer.ll
index 4e5b2100f34a..b93e19ac258d 100644
--- a/llvm/test/Transforms/InstCombine/multi-size-address-space-pointer.ll
+++ b/llvm/test/Transforms/InstCombine/multi-size-address-space-pointer.ll
@@ -1,10 +1,14 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -instcombine %s -o - | FileCheck %s
target datalayout = "e-p:32:32:32-p1:64:64:64-p2:8:8:8-p3:16:16:16-p4:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32"
define i32 @test_as0(i32 addrspace(0)* %a) {
; CHECK-LABEL: @test_as0(
-; CHECK: %arrayidx = getelementptr i32, i32* %a, i32 1
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr i32, i32* [[A:%.*]], i32 1
+; CHECK-NEXT: [[Y:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
+; CHECK-NEXT: ret i32 [[Y]]
+;
%arrayidx = getelementptr i32, i32 addrspace(0)* %a, i64 1
%y = load i32, i32 addrspace(0)* %arrayidx, align 4
ret i32 %y
@@ -12,7 +16,10 @@ define i32 @test_as0(i32 addrspace(0)* %a) {
define i32 @test_as1(i32 addrspace(1)* %a) {
; CHECK-LABEL: @test_as1(
-; CHECK: %arrayidx = getelementptr i32, i32 addrspace(1)* %a, i64 1
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr i32, i32 addrspace(1)* [[A:%.*]], i64 1
+; CHECK-NEXT: [[Y:%.*]] = load i32, i32 addrspace(1)* [[ARRAYIDX]], align 4
+; CHECK-NEXT: ret i32 [[Y]]
+;
%arrayidx = getelementptr i32, i32 addrspace(1)* %a, i32 1
%y = load i32, i32 addrspace(1)* %arrayidx, align 4
ret i32 %y
@@ -20,7 +27,10 @@ define i32 @test_as1(i32 addrspace(1)* %a) {
define i32 @test_as2(i32 addrspace(2)* %a) {
; CHECK-LABEL: @test_as2(
-; CHECK: %arrayidx = getelementptr i32, i32 addrspace(2)* %a, i8 1
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr i32, i32 addrspace(2)* [[A:%.*]], i8 1
+; CHECK-NEXT: [[Y:%.*]] = load i32, i32 addrspace(2)* [[ARRAYIDX]], align 4
+; CHECK-NEXT: ret i32 [[Y]]
+;
%arrayidx = getelementptr i32, i32 addrspace(2)* %a, i32 1
%y = load i32, i32 addrspace(2)* %arrayidx, align 4
ret i32 %y
@@ -28,7 +38,10 @@ define i32 @test_as2(i32 addrspace(2)* %a) {
define i32 @test_as3(i32 addrspace(3)* %a) {
; CHECK-LABEL: @test_as3(
-; CHECK: %arrayidx = getelementptr i32, i32 addrspace(3)* %a, i16 1
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr i32, i32 addrspace(3)* [[A:%.*]], i16 1
+; CHECK-NEXT: [[Y:%.*]] = load i32, i32 addrspace(3)* [[ARRAYIDX]], align 4
+; CHECK-NEXT: ret i32 [[Y]]
+;
%arrayidx = getelementptr i32, i32 addrspace(3)* %a, i32 1
%y = load i32, i32 addrspace(3)* %arrayidx, align 4
ret i32 %y
@@ -36,8 +49,9 @@ define i32 @test_as3(i32 addrspace(3)* %a) {
define i32 @test_combine_ptrtoint(i32 addrspace(2)* %a) {
; CHECK-LABEL: @test_combine_ptrtoint(
-; CHECK-NEXT: %y = load i32, i32 addrspace(2)* %a
-; CHECK-NEXT: ret i32 %y
+; CHECK-NEXT: [[Y:%.*]] = load i32, i32 addrspace(2)* [[A:%.*]], align 4
+; CHECK-NEXT: ret i32 [[Y]]
+;
%cast = ptrtoint i32 addrspace(2)* %a to i8
%castback = inttoptr i8 %cast to i32 addrspace(2)*
%y = load i32, i32 addrspace(2)* %castback, align 4
@@ -46,7 +60,8 @@ define i32 @test_combine_ptrtoint(i32 addrspace(2)* %a) {
define i8 @test_combine_inttoptr(i8 %a) {
; CHECK-LABEL: @test_combine_inttoptr(
-; CHECK-NEXT: ret i8 %a
+; CHECK-NEXT: ret i8 [[A:%.*]]
+;
%cast = inttoptr i8 %a to i32 addrspace(2)*
%castback = ptrtoint i32 addrspace(2)* %cast to i8
ret i8 %castback
@@ -54,9 +69,10 @@ define i8 @test_combine_inttoptr(i8 %a) {
define i32 @test_combine_vector_ptrtoint(<2 x i32 addrspace(2)*> %a) {
; CHECK-LABEL: @test_combine_vector_ptrtoint(
-; CHECK-NEXT: %p = extractelement <2 x i32 addrspace(2)*> %a, i32 0
-; CHECK-NEXT: %y = load i32, i32 addrspace(2)* %p, align 4
-; CHECK-NEXT: ret i32 %y
+; CHECK-NEXT: [[P:%.*]] = extractelement <2 x i32 addrspace(2)*> [[A:%.*]], i32 0
+; CHECK-NEXT: [[Y:%.*]] = load i32, i32 addrspace(2)* [[P]], align 4
+; CHECK-NEXT: ret i32 [[Y]]
+;
%cast = ptrtoint <2 x i32 addrspace(2)*> %a to <2 x i8>
%castback = inttoptr <2 x i8> %cast to <2 x i32 addrspace(2)*>
%p = extractelement <2 x i32 addrspace(2)*> %castback, i32 0
@@ -66,7 +82,8 @@ define i32 @test_combine_vector_ptrtoint(<2 x i32 addrspace(2)*> %a) {
define <2 x i8> @test_combine_vector_inttoptr(<2 x i8> %a) {
; CHECK-LABEL: @test_combine_vector_inttoptr(
-; CHECK-NEXT: ret <2 x i8> %a
+; CHECK-NEXT: ret <2 x i8> [[A:%.*]]
+;
%cast = inttoptr <2 x i8> %a to <2 x i32 addrspace(2)*>
%castback = ptrtoint <2 x i32 addrspace(2)*> %cast to <2 x i8>
ret <2 x i8> %castback
@@ -75,37 +92,47 @@ define <2 x i8> @test_combine_vector_inttoptr(<2 x i8> %a) {
; Check that the GEP index is changed to the address space integer type (i64 -> i8)
define i32 addrspace(2)* @shrink_gep_constant_index_64_as2(i32 addrspace(2)* %p) {
; CHECK-LABEL: @shrink_gep_constant_index_64_as2(
-; CHECK-NEXT: getelementptr i32, i32 addrspace(2)* %p, i8 1
+; CHECK-NEXT: [[RET:%.*]] = getelementptr i32, i32 addrspace(2)* [[P:%.*]], i8 1
+; CHECK-NEXT: ret i32 addrspace(2)* [[RET]]
+;
%ret = getelementptr i32, i32 addrspace(2)* %p, i64 1
ret i32 addrspace(2)* %ret
}
define i32 addrspace(2)* @shrink_gep_constant_index_32_as2(i32 addrspace(2)* %p) {
; CHECK-LABEL: @shrink_gep_constant_index_32_as2(
-; CHECK-NEXT: getelementptr i32, i32 addrspace(2)* %p, i8 1
+; CHECK-NEXT: [[RET:%.*]] = getelementptr i32, i32 addrspace(2)* [[P:%.*]], i8 1
+; CHECK-NEXT: ret i32 addrspace(2)* [[RET]]
+;
%ret = getelementptr i32, i32 addrspace(2)* %p, i32 1
ret i32 addrspace(2)* %ret
}
define i32 addrspace(3)* @shrink_gep_constant_index_64_as3(i32 addrspace(3)* %p) {
; CHECK-LABEL: @shrink_gep_constant_index_64_as3(
-; CHECK-NEXT: getelementptr i32, i32 addrspace(3)* %p, i16 1
+; CHECK-NEXT: [[RET:%.*]] = getelementptr i32, i32 addrspace(3)* [[P:%.*]], i16 1
+; CHECK-NEXT: ret i32 addrspace(3)* [[RET]]
+;
%ret = getelementptr i32, i32 addrspace(3)* %p, i64 1
ret i32 addrspace(3)* %ret
}
define i32 addrspace(2)* @shrink_gep_variable_index_64_as2(i32 addrspace(2)* %p, i64 %idx) {
; CHECK-LABEL: @shrink_gep_variable_index_64_as2(
-; CHECK-NEXT: %1 = trunc i64 %idx to i8
-; CHECK-NEXT: getelementptr i32, i32 addrspace(2)* %p, i8 %1
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[IDX:%.*]] to i8
+; CHECK-NEXT: [[RET:%.*]] = getelementptr i32, i32 addrspace(2)* [[P:%.*]], i8 [[TMP1]]
+; CHECK-NEXT: ret i32 addrspace(2)* [[RET]]
+;
%ret = getelementptr i32, i32 addrspace(2)* %p, i64 %idx
ret i32 addrspace(2)* %ret
}
define i32 addrspace(1)* @grow_gep_variable_index_8_as1(i32 addrspace(1)* %p, i8 %idx) {
; CHECK-LABEL: @grow_gep_variable_index_8_as1(
-; CHECK-NEXT: %1 = sext i8 %idx to i64
-; CHECK-NEXT: getelementptr i32, i32 addrspace(1)* %p, i64 %1
+; CHECK-NEXT: [[TMP1:%.*]] = sext i8 [[IDX:%.*]] to i64
+; CHECK-NEXT: [[RET:%.*]] = getelementptr i32, i32 addrspace(1)* [[P:%.*]], i64 [[TMP1]]
+; CHECK-NEXT: ret i32 addrspace(1)* [[RET]]
+;
%ret = getelementptr i32, i32 addrspace(1)* %p, i8 %idx
ret i32 addrspace(1)* %ret
}
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