[PATCH] D98939: [SelectionDAG][AArch64][SVE] Perform SETCC condition legalization in LegalizeVectorOps

[Bradley Smith via Phabricator via llvm-commits]

bsmith updated this revision to Diff 332342.
bsmith added a comment.
Herald added subscribers: frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, Jim, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, MaskRay, jrtc27, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, nemanjai.

- Fixed failures in PPC/RISCV tests due to slightly different codegen.
- Use getBoolConstant instead of manually constructing true/false values.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98939/new/

https://reviews.llvm.org/D98939

Files:
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/lib/Target/AArch64/SVEInstrFormats.td
  llvm/test/CodeGen/AArch64/sve-fixed-length-float-compares.ll
  llvm/test/CodeGen/PowerPC/vsx.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll

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