[PATCH] D99050: [RISCV] Remove unused SchedWrites WriteFConv32/WriteFConv64/WriteFMov32/WriteFMov64.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: evandro, HsiangKai, asb, luismarques, jrtc27.
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It doesn't look like any instructions have ever been assigned to these classes.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D99050

Files:
  llvm/lib/Target/RISCV/RISCVSchedule.td


Index: llvm/lib/Target/RISCV/RISCVSchedule.td
===================================================================
--- llvm/lib/Target/RISCV/RISCVSchedule.td
+++ llvm/lib/Target/RISCV/RISCVSchedule.td
@@ -67,8 +67,6 @@
 def WriteFCvtF32ToF64  : SchedWrite;
 def WriteFCvtF64ToF32  : SchedWrite;
 
-def WriteFConv32    : SchedWrite;    // 32-bit floating point convert
-def WriteFConv64    : SchedWrite;    // 64-bit floating point convert
 def WriteFClass32   : SchedWrite;    // 32-bit floating point classify
 def WriteFClass64   : SchedWrite;    // 64-bit floating point classify
 def WriteFCmp32     : SchedWrite;    // 32-bit floating point compare
@@ -83,8 +81,6 @@
 def WriteFMovF64ToI64     : SchedWrite;    // RV64I only
 def WriteFMovI64ToF64     : SchedWrite;    // RV64I only
 
-def WriteFMov32       : SchedWrite;    // 32-bit floating point move
-def WriteFMov64       : SchedWrite;    // 64-bit floating point move
 def WriteFLD32        : SchedWrite;    // Floating point sp load
 def WriteFLD64        : SchedWrite;    // Floating point dp load
 def WriteFST32        : SchedWrite;    // Floating point sp store


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