[llvm] b2bb003 - [RISCV] Update comment in RISCVInstrInfoM.td
via llvm-commits
llvm-commits at lists.llvm.org
Sat Mar 20 15:35:42 PDT 2021
Author: Jessica Clarke
Date: 2021-03-20T22:35:40Z
New Revision: b2bb00377452fd7f7901f1876807095fef340514
URL: https://github.com/llvm/llvm-project/commit/b2bb00377452fd7f7901f1876807095fef340514
DIFF: https://github.com/llvm/llvm-project/commit/b2bb00377452fd7f7901f1876807095fef340514.diff
LOG: [RISCV] Update comment in RISCVInstrInfoM.td
Missed in 07ed62b7d551.
Added:
Modified:
llvm/lib/Target/RISCV/RISCVInstrInfoM.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoM.td b/llvm/lib/Target/RISCV/RISCVInstrInfoM.td
index 8d5f3e92355a..d6f8287f199c 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoM.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoM.td
@@ -104,4 +104,4 @@ let Predicates = [HasStdExtM, IsRV64, NotHasStdExtZba] in {
// still be better off shifting both left by 32.
def : Pat<(i64 (mul (and GPR:$rs1, 0xffffffff), (and GPR:$rs2, 0xffffffff))),
(MULHU (SLLI GPR:$rs1, 32), (SLLI GPR:$rs2, 32))>;
-} // Predicates = [HasStdExtM, IsRV64]
+} // Predicates = [HasStdExtM, IsRV64, NotHasStdExtZba]
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