[PATCH] D98857: [DAG] computeKnownBits - add ISD::MULHS/MULHU/SMUL_LOHI/UMUL_LOHI handling
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 19 07:56:03 PDT 2021
RKSimon updated this revision to Diff 331878.
RKSimon retitled this revision from "[DAG] computeKnownBits - add ISD::MULHS/ISD::MULHU handling" to "[DAG] computeKnownBits - add ISD::MULHS/MULHU/SMUL_LOHI/UMUL_LOHI handling".
RKSimon added a comment.
Added *MUL_LOHI handling as the diff was relatively benign
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D98857/new/
https://reviews.llvm.org/D98857
Files:
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
llvm/test/CodeGen/AMDGPU/sdiv64.ll
llvm/test/CodeGen/AMDGPU/srem64.ll
llvm/test/CodeGen/AMDGPU/udiv64.ll
llvm/test/CodeGen/AMDGPU/urem-seteq-illegal-types.ll
llvm/test/CodeGen/AMDGPU/urem64.ll
llvm/test/CodeGen/ARM/select-imm.ll
llvm/test/CodeGen/M68k/Arith/divide-by-constant.ll
llvm/test/CodeGen/PowerPC/urem-seteq-illegal-types.ll
llvm/test/CodeGen/Thumb2/mve-vecreduce-mla.ll
llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll
llvm/test/CodeGen/X86/combine-udiv.ll
llvm/test/CodeGen/X86/omit-urem-of-power-of-two-or-zero-when-comparing-with-zero.ll
llvm/test/CodeGen/X86/smul_fix_sat_constants.ll
llvm/test/CodeGen/X86/umul_fix.ll
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