[PATCH] D98628: [MCA] Disable RCU for InOrderIssueStage

Andrew Savonichev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Mar 18 12:15:38 PDT 2021


asavonic added a comment.

In D98628#2625892 <https://reviews.llvm.org/D98628#2625892>, @andreadb wrote:

> There is nothing wrong with using a dummy RCU for the InOrderIssue stage.
>
> The RCUtokenID is always stored in the instruction at dispatch time. You don't need any changes to pre-existing dispatch stage APIs (and listeners).

Thanks, I missed that.

> Note that your code still does this:
>
>   unsigned RCUTokenID = RetireControlUnit::UnhandledTokenID;
>   IS.dispatch(RCUTokenID);
>
> Your check on `TotalROBEntries` is fine. However, RetireControlUnitStatistics could (and probably should) be disabled for in-order processors (since it doesn't really makes sense).

I made RCU optional and disabled the corresponding statistic for in-order processors.

In D98628#2625846 <https://reviews.llvm.org/D98628#2625846>, @foad wrote:

> Can you remove some of the code added to RetireControlUnit.cpp by D94928 <https://reviews.llvm.org/D94928> and D98356 <https://reviews.llvm.org/D98356>, if it no longer has to cope with in-order CPUs?

Done. RCU is initialized and used only for out-of-order processors now.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98628/new/

https://reviews.llvm.org/D98628



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