[PATCH] D98874: [TTI] Return a TypeSize from getRegisterBitWidth.

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen created this revision.
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sdesmalen requested review of this revision.
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This patch changes the interface to take a RegisterKind, to indicate
whether the register bitwidth of a scalar register, fixed-width vector
register, or scalable vector register must be returned.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D98874

Files:
  llvm/include/llvm/Analysis/TargetTransformInfo.h
  llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
  llvm/include/llvm/CodeGen/BasicTTIImpl.h
  llvm/lib/Analysis/TargetTransformInfo.cpp
  llvm/lib/CodeGen/TypePromotion.cpp
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
  llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
  llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
  llvm/lib/Target/ARM/ARMTargetTransformInfo.h
  llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
  llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
  llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
  llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
  llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
  llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
  llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
  llvm/lib/Target/VE/VETargetTransformInfo.h
  llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
  llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h
  llvm/lib/Target/X86/X86TargetTransformInfo.cpp
  llvm/lib/Target/X86/X86TargetTransformInfo.h
  llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
  llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
  llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

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