[PATCH] D98802: [RISCV][WIP] Fix offset computation for RVV
luxufan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 18 09:03:18 PDT 2021
StephenFan added a comment.
Hi @rogfer01 ! It is reasonable to me. But I think the instruction of `BuildMI(MBB, MBBI, DL, TII->get(RISCV::ADDI), SPReg)` can be eliminated. Firstly, the value of calleeSavedStackSize can be regarded as a aligned value(For example, aligned to MFI.getStackAlign()). Then we can calculate the padding size by the aligned calleeSavedStackSize minus the original calleeSavedStackSize. When emits prologue, we can minus the value of
`MFI.getStackSize() - original calleeSavedStackSize + aligned calleeSavedStackSize`. When get the offset of the rvv object, we can `MFI.getStackSize() - original calleesavedStackSize`, because we just want to calculate the
non-calleesaved field size. My English is poor and I am a beginner of LLVM-RISCV. So I don't know if it makes sense to you.
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https://reviews.llvm.org/D98802/new/
https://reviews.llvm.org/D98802
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