[PATCH] D98845: [X86] Fix a bug when calculating the ldtilecfg insertion points.

Pengfei Wang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Mar 18 02:34:55 PDT 2021


pengfei created this revision.
pengfei added reviewers: LuoYuanke, yubing.
Herald added a subscriber: hiraditya.
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The BB we initialized the ldtilecfg is special. We don't need to check
if its predecessor BBs need to insert ldtilecfg for calls.

We reused the flag HasCallBeforeAMX, so that the predecessors won't be
added to CfgNeedInsert.

This case happens only when the entry BB is in a loop. We need to hoist
the first tile config point out of the loop in future.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D98845

Files:
  llvm/lib/Target/X86/X86PreTileConfig.cpp
  llvm/test/CodeGen/X86/AMX/amx-across-func.ll


Index: llvm/test/CodeGen/X86/AMX/amx-across-func.ll
===================================================================
--- llvm/test/CodeGen/X86/AMX/amx-across-func.ll
+++ llvm/test/CodeGen/X86/AMX/amx-across-func.ll
@@ -280,15 +280,14 @@
 ; CHECK-NEXT:    .p2align 4, 0x90
 ; CHECK-NEXT:  .LBB3_1: # =>This Inner Loop Header: Depth=1
 ; CHECK-NEXT:    callq foo
-; CHECK-NEXT:    movb $1, {{[0-9]+}}(%rsp)
-; CHECK-NEXT:    movb $8, {{[0-9]+}}(%rsp)
-; CHECK-NEXT:    movw $8, {{[0-9]+}}(%rsp)
-; CHECK-NEXT:    ldtilecfg {{[0-9]+}}(%rsp)
 ; CHECK-NEXT:    testl %ebx, %ebx
 ; CHECK-NEXT:    jle .LBB3_3
 ; CHECK-NEXT:  # %bb.2: # in Loop: Header=BB3_1 Depth=1
 ; CHECK-NEXT:    vpxord %zmm0, %zmm0, %zmm0
 ; CHECK-NEXT:    vmovdqu64 %zmm0, {{[0-9]+}}(%rsp)
+; CHECK-NEXT:    movb $1, {{[0-9]+}}(%rsp)
+; CHECK-NEXT:    movb $8, {{[0-9]+}}(%rsp)
+; CHECK-NEXT:    movw $8, {{[0-9]+}}(%rsp)
 ; CHECK-NEXT:    ldtilecfg {{[0-9]+}}(%rsp)
 ; CHECK-NEXT:    tileloadd (%r14,%r15), %tmm0
 ; CHECK-NEXT:    movabsq $64, %rax
Index: llvm/lib/Target/X86/X86PreTileConfig.cpp
===================================================================
--- llvm/lib/Target/X86/X86PreTileConfig.cpp
+++ llvm/lib/Target/X86/X86PreTileConfig.cpp
@@ -296,6 +296,12 @@
   MachineBasicBlock *MBB = MI->getParent();
   BBVisitedInfo[MBB] = BBInfo(CfgNeedInsert, MBB, MI);
 
+  // The entry BB is special, since it always has a ldtilecfg before AMX
+  // instruction. We don't need to check if its predecessor BBs have call.
+  // FIXME: This case happens only when the entry BB is in a loop. We need to
+  // hoist the first tile config point out of the loop in future.
+  BBVisitedInfo[MBB].HasCallBeforeAMX = true;
+
   WorkList.push_back(MBB);
   while (!WorkList.empty()) {
     MBB = WorkList.pop_back_val();


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