[PATCH] D97646: [ASan][RISCV] Fix RISC-V memory mapping

[Luís Marques via Phabricator via llvm-commits]

luismarques added a comment.

In D97646#2632810 <https://reviews.llvm.org/D97646#2632810>, @vitalybuka wrote:

> It's rather recommendation then requirement. Feel free to commit as is.

My point is that I wanted to check that the reasons I provided were actually compelling. If that's not the case then we can wait.



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Comment at: compiler-rt/lib/asan/asan_mapping.h:75
 //
+// Default Linux/RISCV64 Sv39 mapping:
+// || `[0x1555550000, 0x3fffffffff]` || HighMem    ||
----------------
MaskRay wrote:
> Nit: Is Sv39 is a standard abbreviation?
> Nit: Is Sv39 is a standard abbreviation?

Yes. (It's in the RISC-V Privileged Spec)


================
Comment at: compiler-rt/lib/asan/asan_mapping.h:76
+// Default Linux/RISCV64 Sv39 mapping:
+// || `[0x1555550000, 0x3fffffffff]` || HighMem    ||
+// || `[0x0fffffa000, 0x1555555fff]` || HighShadow ||
----------------
MaskRay wrote:
> Question: 0x1555550000 instead of 0x1555560000 because of "hat address had to be further rounded to ensure page alignment after the shadow scale shifting is applied. Still, that value explains why the mapping table may look less regular than expected."?
0x1555550000 instead of 0x1555560000 is the further rounding that ensures it's still page-aligned after the shadow scale shifting, yes.
The division by 3 (of 0x4000000000, a value that isn't "cleanly" divided by 3) causes the irregular-looking table, compared with other tables. The additional alignment isn't enough to make it much more regular. Sorry if the comment wasn't very clear.


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