[llvm] 92b39c6 - [RISCV] Use getTargetExtractSubreg and getTargetInsertSubreg to simplify some code. NFCI

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2021-03-17T12:10:19-07:00
New Revision: 92b39c6907f0b89f3c1c1725e607b13a9cd4de5d

URL: https://github.com/llvm/llvm-project/commit/92b39c6907f0b89f3c1c1725e607b13a9cd4de5d
DIFF: https://github.com/llvm/llvm-project/commit/92b39c6907f0b89f3c1c1725e607b13a9cd4de5d.diff

LOG: [RISCV] Use getTargetExtractSubreg and getTargetInsertSubreg to simplify some code. NFCI

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
index 1a5d834b3164..7ac4f19ebde9 100644
--- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
@@ -988,10 +988,8 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) {
       return ReplaceNode(Node, NewNode);
     }
 
-    SDNode *NewNode = CurDAG->getMachineNode(
-        TargetOpcode::INSERT_SUBREG, DL, VT, V, SubV,
-        CurDAG->getTargetConstant(SubRegIdx, DL, XLenVT));
-    return ReplaceNode(Node, NewNode);
+    SDValue Insert = CurDAG->getTargetInsertSubreg(SubRegIdx, DL, VT, V, SubV);
+    return ReplaceNode(Node, Insert.getNode());
   }
   case ISD::EXTRACT_SUBVECTOR: {
     SDValue V = Node->getOperand(0);
@@ -1033,10 +1031,8 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) {
       return ReplaceNode(Node, NewNode);
     }
 
-    SDNode *NewNode = CurDAG->getMachineNode(
-        TargetOpcode::EXTRACT_SUBREG, DL, VT, V,
-        CurDAG->getTargetConstant(SubRegIdx, DL, XLenVT));
-    return ReplaceNode(Node, NewNode);
+    SDValue Extract = CurDAG->getTargetExtractSubreg(SubRegIdx, DL, VT, V);
+    return ReplaceNode(Node, Extract.getNode());
   }
   }