[PATCH] D97691: [SLP] Honor min/max regsize and min/max VF in vectorizeStores

Anton Afanasyev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 17 03:49:14 PDT 2021

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anton-afanasyev added a comment.

LGTM except for the comment. I think `MaxVecRegSize % EltSize != 0` check  could be removed (together with comment).


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D97691/new/

https://reviews.llvm.org/D97691

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