[PATCH] D94163: [RISCV] Set dependency on floating point CSRs, 1/3
Serge Pavlov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 16 10:03:05 PDT 2021
sepavloff added a comment.
In D94163#2606346 <https://reviews.llvm.org/D94163#2606346>, @jrtc27 wrote:
> In D94163#2605594 <https://reviews.llvm.org/D94163#2605594>, @sepavloff wrote:
>
>> In D94163#2603738 <https://reviews.llvm.org/D94163#2603738>, @asb wrote:
>>
>>> We're also still unclear about the advantage of changing codegen to default to a static rounding mode (which might be a surprising change, as all software compiled to date on both GCC and LLVM has used used the dynamic rounding mode by default).
>>
>> Instructions in assembler without explicit rounding mode specification get dynamic rounding mode as now. Lowering of FP operations like `fadd` uses static rounding mode RNE, because these operations assume default floating point environment (https://llvm.org/docs/LangRef.html#floating-point-environment). Using static rounding mode has some advantages over assuming `frm` to have particular value. The code that requires default rounding mode does not require setting `rfm` in a program where some pieces uses non-default rounding mode. Such code works as designed even if it is called from a region where other rounding mode is set. Such implementation simplifies implementation of things like `#pragma STDC FENV_ROUND` and make programs more robust.
>
> That's going to break huge piles of C/C++ code that sets the (dynamic) rounding mode and expects it to have an effect on subsequent computations. I do not think that is a good idea.
You are right, it might be dangerous. While RISC-V does not support constrained intrinsics, it would be safer to use instructions with dynamic rounding mode.
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