[PATCH] D98708: [LoopVectorize] relax FMF constraint for FP induction

[Sanjay Patel via Phabricator via llvm-commits]

spatel created this revision.
spatel added reviewers: dmgreen, fhahn, kmclaughlin, david-arm, peterwaller-arm.
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This makes the induction part of the loop vectorizer match the reduction part. We do not need all of the fast-math-flags. For example, there are some that clearly are not in play like `arcp` or `afn`.

If we want to make FMF constraints consistent across the IR optimizer, we might want to add `nsz` too, but that's up for debate (users can't expect associative FP math and preservation of sign-of-zero at the same time?).

I fixed the calling code to avoid miscompiles with 1bee549737ac <https://reviews.llvm.org/rG1bee549737ace3a96288d8b16768aec5899fbb91> and don't know of any more places in LV that need to be patched.


https://reviews.llvm.org/D98708

Files:
  llvm/include/llvm/Analysis/IVDescriptors.h
  llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
  llvm/test/Transforms/LoopVectorize/float-induction.ll

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