[PATCH] D98706: [SCEV] Add false->any implication to save compile time

Tue Mar 16 07:04:48 PDT 2021

lebedev.ri added a comment.

In D98706#2628924 <https://reviews.llvm.org/D98706#2628924>, @mkazantsev wrote:

> In D98706#2628911 <https://reviews.llvm.org/D98706#2628911>, @lebedev.ri wrote:
>
>> In D98706#2628906 <https://reviews.llvm.org/D98706#2628906>, @mkazantsev wrote:
>>
>>> Theoretically it should help, but maybe the price of triggered transformations will outweight the benefit. Can we run the automation to figure out if it actually helps?

TBF, we don't actually know what causes the cost there, do we?
Perhaps the change is cheap, but it happens to be so good that it enables further optimizations (or at least attempts thereof).

>> https://llvm-compile-time-tracker.com/compare.php?from=49d0e115d5df40aa89339f4ace7a8dee378c03bb&to=369fd47a59582996bae60e37856b35718f8f4877&stat=instructions
>
> Thanks Roman! Let's see if it gives us something..

And apparently done.
Same situation :)

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