[PATCH] D98693: [ARM] Use lrdsb for more thumb1 loads.

[Dave Green via Phabricator via llvm-commits]

dmgreen created this revision.
dmgreen added reviewers: SjoerdMeijer, NickGuy, simon_tatham, efriedma, ostannard.
Herald added subscribers: danielkiss, hiraditya, kristof.beyls.
dmgreen requested review of this revision.
Herald added a project: LLVM.

Given a `sextload i16`, we can usually generate `ldrsh [rn. rm]`. If we don't naturally have a rn, rm addressing mode, we can either generate `ldrh rn, #0; sxth` or `mov rm, #0; ldrsh [rn. rm]`.

We currently generate the first, always creating a sxth. They are both the same number of instructions, but If we generate the second then the mov #0 will likely be CSE'd or pulled out of a loop, etc.

This adjusts the ISel patterns to do that, creating a mov instead of a sxth.


https://reviews.llvm.org/D98693

Files:
  llvm/lib/Target/ARM/ARMInstrThumb.td
  llvm/test/CodeGen/ARM/load.ll
  llvm/test/CodeGen/ARM/select-imm.ll
  llvm/test/CodeGen/Thumb/ldr_ext.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D98693.330920.patch
Type: text/x-patch
Size: 3122 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210316/11dbf4d5/attachment.bin>