[PATCH] D98401: [CodeGen] Fix backward copy propagation with -g

Zhiwei Chen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 16 01:30:44 PDT 2021


condy updated this revision to Diff 330899.
condy added a comment.

Move test to machine-copy-props.mir


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98401/new/

https://reviews.llvm.org/D98401

Files:
  llvm/lib/CodeGen/MachineCopyPropagation.cpp
  llvm/test/CodeGen/X86/machine-copy-prop.mir


Index: llvm/test/CodeGen/X86/machine-copy-prop.mir
===================================================================
--- llvm/test/CodeGen/X86/machine-copy-prop.mir
+++ llvm/test/CodeGen/X86/machine-copy-prop.mir
@@ -14,6 +14,7 @@
   define void @nocopyprop3() { ret void }
   define void @nocopyprop4() { ret void }
   define void @nocopyprop5() { ret void }
+  define void @dont_clobber_register_in_dbg_value() { ret void }
 ...
 ---
 # The second copy is redundant and will be removed, check that we also remove
@@ -213,3 +214,18 @@
     $rip = COPY $rax
     $rip = COPY $rax
 ...
+---
+# Don't clobber register when it's in DBG_VALUE.
+# CHECK-LABEL: name: dont_clobber_register_in_dbg_value
+# CHECK: renamable $rbx = LEA64r $rax, 1, $noreg, 8, $noreg
+# CHECK-NEXT: DBG_VALUE $rbp, $noreg
+# CHECK-NEXT: DBG_VALUE $noreg, $noreg
+name: dont_clobber_register_in_dbg_value
+tracksRegLiveness: false
+body: |
+  bb.0:
+    renamable $rbp = LEA64r $rax, 1, $noreg, 8, $noreg
+    DBG_VALUE $rbp, $noreg
+    renamable $rbx = COPY killed renamable $rbp
+    DBG_VALUE $noreg, $noreg
+...
Index: llvm/lib/CodeGen/MachineCopyPropagation.cpp
===================================================================
--- llvm/lib/CodeGen/MachineCopyPropagation.cpp
+++ llvm/lib/CodeGen/MachineCopyPropagation.cpp
@@ -575,6 +575,10 @@
     MachineInstr *MI = &*I;
     ++I;
 
+    // Ignore DBG_VALUEs and other meta info
+    if (MI->isMetaInstruction())
+      continue;
+
     // Analyze copies (which don't overlap themselves).
     if (MI->isCopy() && !TRI->regsOverlap(MI->getOperand(0).getReg(),
                                           MI->getOperand(1).getReg())) {
@@ -828,6 +832,10 @@
     MachineInstr *MI = &*I;
     ++I;
 
+    // Ignore DBG_VALUEs and other meta info
+    if (MI->isMetaInstruction())
+      continue;
+
     // Ignore non-trivial COPYs.
     if (MI->isCopy() && MI->getNumOperands() == 2 &&
         !TRI->regsOverlap(MI->getOperand(0).getReg(),


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