[PATCH] D98464: [GlobalISel] Add G_SBFX + G_UBFX (bitfield extraction opcodes)

Amara Emerson via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 15 15:00:37 PDT 2021


aemerson added a comment.

In D98464#2622885 <https://reviews.llvm.org/D98464#2622885>, @paquette wrote:

> I think something like this would work post-legalization:
>
>   // We'd need these functions...
>   if (isBeforeLegalizer() || !isLegal(...))
>     return false;
>   
>   Register LshrLHS, LshrRHS;
>   int64_t Mask;
>   if (!mi_match(Reg, MRI,
>                 m_GAnd(m_GLShr(m_Reg(LshrLHS), m_Reg(LshrRHS)), m_ICst(Mask))))
>     return false;
>   if (/*Mask isn't a mask...*/)
>     return false;
>   
>   if (TLI.allowsRegisterExtractOps(/*...*/)) {
>     // ... Do stuff ...
>     return true;
>   }
>   
>   // Need immediates for LSB + width.
>   int64_t LshrImm;
>   if (!mi_match(LshrRHS, MRI, m_ICst(LshrImm)))
>     return false;
>   
>   // ... Do stuff ...
>   return true;

So we form these post-legalize only if we can see that the sources are constant for arm64. Sounds reasonable to me. @arsenm that ok for AMDGPU?


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