[PATCH] D98600: [X86][FastISel] Fix with.overflow eflags clobber (PR49587)

Nikita Popov via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 15 10:53:39 PDT 2021


nikic added a comment.

In D98600#2625947 <https://reviews.llvm.org/D98600#2625947>, @nagisa wrote:

> Yeah that looks like the one.
>
> Alright, in that case, then, there are a couple other alternative approaches that I think would likely address this class of problems in a more general way:
>
> First, changing the emission of constant->register moves to always produce a `mov`, thus no longer clobbering the flags ever. This way adding arbitrary constant production all over the place wouldn't have potentially far reaching consequences.

That would be a possibility, but does mean that we'd be using mov instead of xor for all zero constant materializations, which seems rather undesirable to me. At least if we don't want to add special-case logic just for phis.

> Alternatively, mayhaps it is possible to check that we haven't inserted any //machine// instructions between the code generated for the intrinsic and the branch? That would make the "Make sure nothing is in the way" check significantly more direct, I feel.

This isn't possible because FastISel selects instructions in reverse order. This means that we first select the terminator (where we have to make the decision on whether to fold), then we select the phi movement, and then we select the overflow intrinsic.


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