[PATCH] D98159: [RISCV] Add RISCVISD::BR_CC similar to RISCVISD::SELECT_CC.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 15 10:29:46 PDT 2021
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:1884
if (Op.getSimpleValueType() == XLenVT && CondV.getOpcode() == ISD::SETCC &&
- CondV.getOperand(0).getSimpleValueType() == XLenVT) {
+ CondV.getOperand(0).getValueType() == XLenVT) {
SDValue LHS = CondV.getOperand(0);
----------------
I'll split this out or drop it. It was a little less bad when we were also changing the signature of normaliseSetCC in this patch.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D98159/new/
https://reviews.llvm.org/D98159
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