[PATCH] D98527: [M68k] Tidy up some bit shifting during code emission

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a reviewer: RKSimon.
RKSimon added inline comments.


================
Comment at: llvm/lib/Target/M68k/MCTargetDesc/M68kMCCodeEmitter.cpp:183
   // Writing Value in host's endianness
-  Buffer |= Val << Offset;
-  return Size;
+  Buffer |= (Val & ((1 << Size) - 1)) << Offset;
+  return Size + Pad;
----------------
1ULL  << Size ?


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Comment at: llvm/lib/Target/M68k/MCTargetDesc/M68kMCCodeEmitter.cpp:315
 
-  return EmitConstant(Imm & (UINT64_MAX >> (64 - Size)), Size, Pad, Buffer,
-                      Offset);
+  return EmitConstant(Imm & ((1 << Size) - 1), Size, Pad, Buffer, Offset);
 }
----------------
Should this be 1ULL << Size? Otherwise some compilers will warn that that you're extending a 32-bit result to 64-bits.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98527/new/

https://reviews.llvm.org/D98527