[PATCH] D98464: [GlobalISel] Add G_SBFX + G_UBFX (bitfield extraction opcodes)

[Jessica Paquette via Phabricator via llvm-commits]

paquette added a comment.

In D98464#2622698 <https://reviews.llvm.org/D98464#2622698>, @aemerson wrote:

> If we have to allow variable width operands for these, it doesn't really help AArch64 that much. We have to match the constant pattern to a target specific opcode, and then lower the rest of these to shifts by default. I can see the benefit of AMDGPU, but with variable extracts this just puts us back where we started for AArch64.

Would a `allowsVariableWidthExtracts` hook of some sort help? Then we could match the constants-only pattern in AArch64, but allow other targets to have variable-width operands.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98464/new/

https://reviews.llvm.org/D98464