[PATCH] D98247: [X86][AMX] Prevent transforming load pointer from <256 x i32>* to x86_amx*.

Pengfei Wang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Mar 12 00:23:43 PST 2021


pengfei added a comment.

In D98247#2621399 <https://reviews.llvm.org/D98247#2621399>, @lebedev.ri wrote:

> In D98247#2615797 <https://reviews.llvm.org/D98247#2615797>, @LuoYuanke wrote:
>
>> And it cause much work to support it. So we want to prevent generating x86_amx* in our IR.
>
> How much work?
> I honestly still don't understand how handling the LHS version of IR in this diff is harder than RHS.

2 aspects. 1) It will increase compiling time. We actually need to handle it in codegen by truning it into `load <256 x i32> + bitcast to x86_amx` and lower it to a tileload in pass "lower-amx-type". We also need to infer the tile shape by its use. 2) It will increase registers pressure of tile. We only have 8 tile registers. And what makes it worse is that the different shapes cannot be reused after tileconfig.
But if we keep it as non AMX ptr, it's probably lowed to optimizated memcpy. That's why I think it is "cheap".


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