[PATCH] D94604: [CodeGen] Allow parallel uses of a resource
Andrea Di Biagio via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 11 09:35:09 PST 2021
andreadb added a comment.
In D94604#2619805 <https://reviews.llvm.org/D94604#2619805>, @dpenry wrote:
> OK. So X86 isn't a concern because it isn't using MachineScheduler (at least not post-RA).
>
> Indeed, after looking a bit to brainstorm how MachineScheduler would change, I note that only when BufferSize of a resource is 0 does MachineScheduler update any of the resource usage (ReservedCycles). And with a bit more digging, there is currently only one upstream scheduling model which uses both BufferSize = 0 and resource groups -- and the resource group itself doesn't have BufferSize=0. So, a change to MachineScheduler to respect groups when BufferSize = 0 doesn't look like it's likely to cause much disruption.
>
> I'll go try that out and see what happens.
Yeah. For what I remember, BufferSize=0 is kind of special because it is used to simulate in-order units in a otherwise out-of-order backend.
Which - if you think of groups like schedulers - kinda makes sense. A scheduler with no buffer is forced to immediately issue instructions at dispatch time. So, dispatching is effectively equivalent to issuing instructions. I had to specially support that in llvm-mca (it gave me some headhaches).
There should be a nice comment about it in TargetSchedule.td
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