[llvm] e9426df - [ValueTypes][RISCV] Add MVT for v1f16.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 11 09:24:32 PST 2021
Author: Craig Topper
Date: 2021-03-11T09:23:18-08:00
New Revision: e9426dfbaeb2da54e40ca8e02af2eea54637581b
URL: https://github.com/llvm/llvm-project/commit/e9426dfbaeb2da54e40ca8e02af2eea54637581b
DIFF: https://github.com/llvm/llvm-project/commit/e9426dfbaeb2da54e40ca8e02af2eea54637581b.diff
LOG: [ValueTypes][RISCV] Add MVT for v1f16.
RISCV makes all fixed vector MVTs with size less than or equal
to a command line option legal.
This didn't include v1f16 because it was missing but did include v1f32 and v1f64.
One test is affected where we did test this type, but it is a horizontal
reduction so it is non-sensical. Perhaps we should canonicalize that
away somewhere.
I'm not sure if we should be making v1 types legal, but this will at
least make RISCV consistent across all types.
Reviewed By: frasercrmck
Differential Revision: https://reviews.llvm.org/D98365
Added:
Modified:
llvm/include/llvm/CodeGen/ValueTypes.td
llvm/include/llvm/Support/MachineValueType.h
llvm/lib/CodeGen/ValueTypes.cpp
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/ValueTypes.td b/llvm/include/llvm/CodeGen/ValueTypes.td
index 9330ab69c491..1ac9e47cab69 100644
--- a/llvm/include/llvm/CodeGen/ValueTypes.td
+++ b/llvm/include/llvm/CodeGen/ValueTypes.td
@@ -93,110 +93,111 @@ def v256i64: ValueType<16384,66>; // 256 x i64 vector value
def v1i128 : ValueType<128, 67>; // 1 x i128 vector value
-def v2f16 : ValueType<32 , 68>; // 2 x f16 vector value
-def v3f16 : ValueType<48 , 69>; // 3 x f16 vector value
-def v4f16 : ValueType<64 , 70>; // 4 x f16 vector value
-def v8f16 : ValueType<128, 71>; // 8 x f16 vector value
-def v16f16 : ValueType<256, 72>; // 16 x f16 vector value
-def v32f16 : ValueType<512, 73>; // 32 x f16 vector value
-def v64f16 : ValueType<1024, 74>; // 64 x f16 vector value
-def v128f16 : ValueType<2048, 75>; // 128 x f16 vector value
-def v2bf16 : ValueType<32 , 76>; // 2 x bf16 vector value
-def v3bf16 : ValueType<48 , 77>; // 3 x bf16 vector value
-def v4bf16 : ValueType<64 , 78>; // 4 x bf16 vector value
-def v8bf16 : ValueType<128, 79>; // 8 x bf16 vector value
-def v16bf16 : ValueType<256, 80>; // 16 x bf16 vector value
-def v32bf16 : ValueType<512, 81>; // 32 x bf16 vector value
-def v64bf16 : ValueType<1024, 82>; // 64 x bf16 vector value
-def v128bf16 : ValueType<2048, 83>; // 128 x bf16 vector value
-def v1f32 : ValueType<32 , 84>; // 1 x f32 vector value
-def v2f32 : ValueType<64 , 85>; // 2 x f32 vector value
-def v3f32 : ValueType<96 , 86>; // 3 x f32 vector value
-def v4f32 : ValueType<128, 87>; // 4 x f32 vector value
-def v5f32 : ValueType<160, 88>; // 5 x f32 vector value
-def v8f32 : ValueType<256, 89>; // 8 x f32 vector value
-def v16f32 : ValueType<512, 90>; // 16 x f32 vector value
-def v32f32 : ValueType<1024, 91>; // 32 x f32 vector value
-def v64f32 : ValueType<2048, 92>; // 64 x f32 vector value
-def v128f32 : ValueType<4096, 93>; // 128 x f32 vector value
-def v256f32 : ValueType<8182, 94>; // 256 x f32 vector value
-def v512f32 : ValueType<16384, 95>; // 512 x f32 vector value
-def v1024f32 : ValueType<32768, 96>; // 1024 x f32 vector value
-def v2048f32 : ValueType<65536, 97>; // 2048 x f32 vector value
-def v1f64 : ValueType<64, 98>; // 1 x f64 vector value
-def v2f64 : ValueType<128, 99>; // 2 x f64 vector value
-def v4f64 : ValueType<256, 100>; // 4 x f64 vector value
-def v8f64 : ValueType<512, 101>; // 8 x f64 vector value
-def v16f64 : ValueType<1024, 102>; // 16 x f64 vector value
-def v32f64 : ValueType<2048, 103>; // 32 x f64 vector value
-def v64f64 : ValueType<4096, 104>; // 64 x f64 vector value
-def v128f64 : ValueType<8192, 105>; // 128 x f64 vector value
-def v256f64 : ValueType<16384, 106>; // 256 x f64 vector value
-
-def nxv1i1 : ValueType<1, 107>; // n x 1 x i1 vector value
-def nxv2i1 : ValueType<2, 108>; // n x 2 x i1 vector value
-def nxv4i1 : ValueType<4, 109>; // n x 4 x i1 vector value
-def nxv8i1 : ValueType<8, 110>; // n x 8 x i1 vector value
-def nxv16i1 : ValueType<16, 111>; // n x 16 x i1 vector value
-def nxv32i1 : ValueType<32, 112>; // n x 32 x i1 vector value
-def nxv64i1 : ValueType<64,113>; // n x 64 x i1 vector value
-
-def nxv1i8 : ValueType<8, 114>; // n x 1 x i8 vector value
-def nxv2i8 : ValueType<16, 115>; // n x 2 x i8 vector value
-def nxv4i8 : ValueType<32, 116>; // n x 4 x i8 vector value
-def nxv8i8 : ValueType<64, 117>; // n x 8 x i8 vector value
-def nxv16i8 : ValueType<128, 118>; // n x 16 x i8 vector value
-def nxv32i8 : ValueType<256, 119>; // n x 32 x i8 vector value
-def nxv64i8 : ValueType<512, 120>; // n x 64 x i8 vector value
-
-def nxv1i16 : ValueType<16, 121>; // n x 1 x i16 vector value
-def nxv2i16 : ValueType<32, 122>; // n x 2 x i16 vector value
-def nxv4i16 : ValueType<64, 123>; // n x 4 x i16 vector value
-def nxv8i16 : ValueType<128, 124>; // n x 8 x i16 vector value
-def nxv16i16: ValueType<256, 125>; // n x 16 x i16 vector value
-def nxv32i16: ValueType<512, 126>; // n x 32 x i16 vector value
-
-def nxv1i32 : ValueType<32, 127>; // n x 1 x i32 vector value
-def nxv2i32 : ValueType<64, 128>; // n x 2 x i32 vector value
-def nxv4i32 : ValueType<128, 129>; // n x 4 x i32 vector value
-def nxv8i32 : ValueType<256, 130>; // n x 8 x i32 vector value
-def nxv16i32: ValueType<512, 131>; // n x 16 x i32 vector value
-def nxv32i32: ValueType<1024,132>; // n x 32 x i32 vector value
-
-def nxv1i64 : ValueType<64, 133>; // n x 1 x i64 vector value
-def nxv2i64 : ValueType<128, 134>; // n x 2 x i64 vector value
-def nxv4i64 : ValueType<256, 135>; // n x 4 x i64 vector value
-def nxv8i64 : ValueType<512, 136>; // n x 8 x i64 vector value
-def nxv16i64: ValueType<1024,137>; // n x 16 x i64 vector value
-def nxv32i64: ValueType<2048,138>; // n x 32 x i64 vector value
-
-def nxv1f16 : ValueType<16, 139>; // n x 1 x f16 vector value
-def nxv2f16 : ValueType<32, 140>; // n x 2 x f16 vector value
-def nxv4f16 : ValueType<64, 141>; // n x 4 x f16 vector value
-def nxv8f16 : ValueType<128,142>; // n x 8 x f16 vector value
-def nxv16f16 : ValueType<256,143>; // n x 16 x f16 vector value
-def nxv32f16 : ValueType<512,144>; // n x 32 x f16 vector value
-def nxv1bf16 : ValueType<16, 145>; // n x 1 x bf16 vector value
-def nxv2bf16 : ValueType<32, 146>; // n x 2 x bf16 vector value
-def nxv4bf16 : ValueType<64, 147>; // n x 4 x bf16 vector value
-def nxv8bf16 : ValueType<128,148>; // n x 8 x bf16 vector value
-def nxv1f32 : ValueType<32, 149>; // n x 1 x f32 vector value
-def nxv2f32 : ValueType<64, 150>; // n x 2 x f32 vector value
-def nxv4f32 : ValueType<128,151>; // n x 4 x f32 vector value
-def nxv8f32 : ValueType<256,152>; // n x 8 x f32 vector value
-def nxv16f32 : ValueType<512,153>; // n x 16 x f32 vector value
-def nxv1f64 : ValueType<64, 154>; // n x 1 x f64 vector value
-def nxv2f64 : ValueType<128,155>; // n x 2 x f64 vector value
-def nxv4f64 : ValueType<256,156>; // n x 4 x f64 vector value
-def nxv8f64 : ValueType<512,157>; // n x 8 x f64 vector value
-
-def x86mmx : ValueType<64, 158>; // X86 MMX value
-def FlagVT : ValueType<0, 159>; // Pre-RA sched glue
-def isVoid : ValueType<0, 160>; // Produces no value
-def untyped: ValueType<8, 161>; // Produces an untyped value
-def funcref : ValueType<0, 162>; // WebAssembly's funcref type
-def externref : ValueType<0, 163>; // WebAssembly's externref type
-def x86amx : ValueType<8192, 164>; // X86 AMX value
+def v1f16 : ValueType<16 , 68>; // 1 x f16 vector value
+def v2f16 : ValueType<32 , 69>; // 2 x f16 vector value
+def v3f16 : ValueType<48 , 70>; // 3 x f16 vector value
+def v4f16 : ValueType<64 , 71>; // 4 x f16 vector value
+def v8f16 : ValueType<128, 72>; // 8 x f16 vector value
+def v16f16 : ValueType<256, 73>; // 16 x f16 vector value
+def v32f16 : ValueType<512, 74>; // 32 x f16 vector value
+def v64f16 : ValueType<1024, 75>; // 64 x f16 vector value
+def v128f16 : ValueType<2048, 76>; // 128 x f16 vector value
+def v2bf16 : ValueType<32 , 77>; // 2 x bf16 vector value
+def v3bf16 : ValueType<48 , 78>; // 3 x bf16 vector value
+def v4bf16 : ValueType<64 , 79>; // 4 x bf16 vector value
+def v8bf16 : ValueType<128, 80>; // 8 x bf16 vector value
+def v16bf16 : ValueType<256, 81>; // 16 x bf16 vector value
+def v32bf16 : ValueType<512, 82>; // 32 x bf16 vector value
+def v64bf16 : ValueType<1024, 83>; // 64 x bf16 vector value
+def v128bf16 : ValueType<2048, 84>; // 128 x bf16 vector value
+def v1f32 : ValueType<32 , 85>; // 1 x f32 vector value
+def v2f32 : ValueType<64 , 86>; // 2 x f32 vector value
+def v3f32 : ValueType<96 , 87>; // 3 x f32 vector value
+def v4f32 : ValueType<128, 88>; // 4 x f32 vector value
+def v5f32 : ValueType<160, 89>; // 5 x f32 vector value
+def v8f32 : ValueType<256, 90>; // 8 x f32 vector value
+def v16f32 : ValueType<512, 91>; // 16 x f32 vector value
+def v32f32 : ValueType<1024, 92>; // 32 x f32 vector value
+def v64f32 : ValueType<2048, 93>; // 64 x f32 vector value
+def v128f32 : ValueType<4096, 94>; // 128 x f32 vector value
+def v256f32 : ValueType<8182, 95>; // 256 x f32 vector value
+def v512f32 : ValueType<16384, 96>; // 512 x f32 vector value
+def v1024f32 : ValueType<32768, 97>; // 1024 x f32 vector value
+def v2048f32 : ValueType<65536, 98>; // 2048 x f32 vector value
+def v1f64 : ValueType<64, 99>; // 1 x f64 vector value
+def v2f64 : ValueType<128, 100>; // 2 x f64 vector value
+def v4f64 : ValueType<256, 101>; // 4 x f64 vector value
+def v8f64 : ValueType<512, 102>; // 8 x f64 vector value
+def v16f64 : ValueType<1024, 103>; // 16 x f64 vector value
+def v32f64 : ValueType<2048, 104>; // 32 x f64 vector value
+def v64f64 : ValueType<4096, 105>; // 64 x f64 vector value
+def v128f64 : ValueType<8192, 106>; // 128 x f64 vector value
+def v256f64 : ValueType<16384, 107>; // 256 x f64 vector value
+
+def nxv1i1 : ValueType<1, 108>; // n x 1 x i1 vector value
+def nxv2i1 : ValueType<2, 109>; // n x 2 x i1 vector value
+def nxv4i1 : ValueType<4, 110>; // n x 4 x i1 vector value
+def nxv8i1 : ValueType<8, 111>; // n x 8 x i1 vector value
+def nxv16i1 : ValueType<16, 112>; // n x 16 x i1 vector value
+def nxv32i1 : ValueType<32, 113>; // n x 32 x i1 vector value
+def nxv64i1 : ValueType<64,114>; // n x 64 x i1 vector value
+
+def nxv1i8 : ValueType<8, 115>; // n x 1 x i8 vector value
+def nxv2i8 : ValueType<16, 116>; // n x 2 x i8 vector value
+def nxv4i8 : ValueType<32, 117>; // n x 4 x i8 vector value
+def nxv8i8 : ValueType<64, 118>; // n x 8 x i8 vector value
+def nxv16i8 : ValueType<128, 119>; // n x 16 x i8 vector value
+def nxv32i8 : ValueType<256, 120>; // n x 32 x i8 vector value
+def nxv64i8 : ValueType<512, 121>; // n x 64 x i8 vector value
+
+def nxv1i16 : ValueType<16, 122>; // n x 1 x i16 vector value
+def nxv2i16 : ValueType<32, 123>; // n x 2 x i16 vector value
+def nxv4i16 : ValueType<64, 124>; // n x 4 x i16 vector value
+def nxv8i16 : ValueType<128, 125>; // n x 8 x i16 vector value
+def nxv16i16: ValueType<256, 126>; // n x 16 x i16 vector value
+def nxv32i16: ValueType<512, 127>; // n x 32 x i16 vector value
+
+def nxv1i32 : ValueType<32, 128>; // n x 1 x i32 vector value
+def nxv2i32 : ValueType<64, 129>; // n x 2 x i32 vector value
+def nxv4i32 : ValueType<128, 130>; // n x 4 x i32 vector value
+def nxv8i32 : ValueType<256, 131>; // n x 8 x i32 vector value
+def nxv16i32: ValueType<512, 132>; // n x 16 x i32 vector value
+def nxv32i32: ValueType<1024,133>; // n x 32 x i32 vector value
+
+def nxv1i64 : ValueType<64, 134>; // n x 1 x i64 vector value
+def nxv2i64 : ValueType<128, 135>; // n x 2 x i64 vector value
+def nxv4i64 : ValueType<256, 136>; // n x 4 x i64 vector value
+def nxv8i64 : ValueType<512, 137>; // n x 8 x i64 vector value
+def nxv16i64: ValueType<1024,138>; // n x 16 x i64 vector value
+def nxv32i64: ValueType<2048,139>; // n x 32 x i64 vector value
+
+def nxv1f16 : ValueType<16, 140>; // n x 1 x f16 vector value
+def nxv2f16 : ValueType<32, 141>; // n x 2 x f16 vector value
+def nxv4f16 : ValueType<64, 142>; // n x 4 x f16 vector value
+def nxv8f16 : ValueType<128,143>; // n x 8 x f16 vector value
+def nxv16f16 : ValueType<256,144>; // n x 16 x f16 vector value
+def nxv32f16 : ValueType<512,145>; // n x 32 x f16 vector value
+def nxv1bf16 : ValueType<16, 146>; // n x 1 x bf16 vector value
+def nxv2bf16 : ValueType<32, 147>; // n x 2 x bf16 vector value
+def nxv4bf16 : ValueType<64, 148>; // n x 4 x bf16 vector value
+def nxv8bf16 : ValueType<128,149>; // n x 8 x bf16 vector value
+def nxv1f32 : ValueType<32, 150>; // n x 1 x f32 vector value
+def nxv2f32 : ValueType<64, 151>; // n x 2 x f32 vector value
+def nxv4f32 : ValueType<128,152>; // n x 4 x f32 vector value
+def nxv8f32 : ValueType<256,153>; // n x 8 x f32 vector value
+def nxv16f32 : ValueType<512,154>; // n x 16 x f32 vector value
+def nxv1f64 : ValueType<64, 155>; // n x 1 x f64 vector value
+def nxv2f64 : ValueType<128,156>; // n x 2 x f64 vector value
+def nxv4f64 : ValueType<256,157>; // n x 4 x f64 vector value
+def nxv8f64 : ValueType<512,158>; // n x 8 x f64 vector value
+
+def x86mmx : ValueType<64, 159>; // X86 MMX value
+def FlagVT : ValueType<0, 160>; // Pre-RA sched glue
+def isVoid : ValueType<0, 161>; // Produces no value
+def untyped: ValueType<8, 162>; // Produces an untyped value
+def funcref : ValueType<0, 163>; // WebAssembly's funcref type
+def externref : ValueType<0, 164>; // WebAssembly's externref type
+def x86amx : ValueType<8192, 165>; // X86 AMX value
def token : ValueType<0 , 248>; // TokenTy
diff --git a/llvm/include/llvm/Support/MachineValueType.h b/llvm/include/llvm/Support/MachineValueType.h
index 4075b6dd4bc7..e663953d0577 100644
--- a/llvm/include/llvm/Support/MachineValueType.h
+++ b/llvm/include/llvm/Support/MachineValueType.h
@@ -120,111 +120,112 @@ namespace llvm {
FIRST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE = v1i1,
LAST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE = v1i128,
- v2f16 = 68, // 2 x f16
- v3f16 = 69, // 3 x f16
- v4f16 = 70, // 4 x f16
- v8f16 = 71, // 8 x f16
- v16f16 = 72, // 16 x f16
- v32f16 = 73, // 32 x f16
- v64f16 = 74, // 64 x f16
- v128f16 = 75, // 128 x f16
- v2bf16 = 76, // 2 x bf16
- v3bf16 = 77, // 3 x bf16
- v4bf16 = 78, // 4 x bf16
- v8bf16 = 79, // 8 x bf16
- v16bf16 = 80, // 16 x bf16
- v32bf16 = 81, // 32 x bf16
- v64bf16 = 82, // 64 x bf16
- v128bf16 = 83, // 128 x bf16
- v1f32 = 84, // 1 x f32
- v2f32 = 85, // 2 x f32
- v3f32 = 86, // 3 x f32
- v4f32 = 87, // 4 x f32
- v5f32 = 88, // 5 x f32
- v8f32 = 89, // 8 x f32
- v16f32 = 90, // 16 x f32
- v32f32 = 91, // 32 x f32
- v64f32 = 92, // 64 x f32
- v128f32 = 93, // 128 x f32
- v256f32 = 94, // 256 x f32
- v512f32 = 95, // 512 x f32
- v1024f32 = 96, // 1024 x f32
- v2048f32 = 97, // 2048 x f32
- v1f64 = 98, // 1 x f64
- v2f64 = 99, // 2 x f64
- v4f64 = 100, // 4 x f64
- v8f64 = 101, // 8 x f64
- v16f64 = 102, // 16 x f64
- v32f64 = 103, // 32 x f64
- v64f64 = 104, // 64 x f64
- v128f64 = 105, // 128 x f64
- v256f64 = 106, // 256 x f64
-
- FIRST_FP_FIXEDLEN_VECTOR_VALUETYPE = v2f16,
+ v1f16 = 68, // 1 x f16
+ v2f16 = 69, // 2 x f16
+ v3f16 = 70, // 3 x f16
+ v4f16 = 71, // 4 x f16
+ v8f16 = 72, // 8 x f16
+ v16f16 = 73, // 16 x f16
+ v32f16 = 74, // 32 x f16
+ v64f16 = 75, // 64 x f16
+ v128f16 = 76, // 128 x f16
+ v2bf16 = 77, // 2 x bf16
+ v3bf16 = 78, // 3 x bf16
+ v4bf16 = 79, // 4 x bf16
+ v8bf16 = 80, // 8 x bf16
+ v16bf16 = 81, // 16 x bf16
+ v32bf16 = 82, // 32 x bf16
+ v64bf16 = 83, // 64 x bf16
+ v128bf16 = 84, // 128 x bf16
+ v1f32 = 85, // 1 x f32
+ v2f32 = 86, // 2 x f32
+ v3f32 = 87, // 3 x f32
+ v4f32 = 88, // 4 x f32
+ v5f32 = 89, // 5 x f32
+ v8f32 = 90, // 8 x f32
+ v16f32 = 91, // 16 x f32
+ v32f32 = 92, // 32 x f32
+ v64f32 = 93, // 64 x f32
+ v128f32 = 94, // 128 x f32
+ v256f32 = 95, // 256 x f32
+ v512f32 = 96, // 512 x f32
+ v1024f32 = 97, // 1024 x f32
+ v2048f32 = 98, // 2048 x f32
+ v1f64 = 99, // 1 x f64
+ v2f64 = 100, // 2 x f64
+ v4f64 = 101, // 4 x f64
+ v8f64 = 102, // 8 x f64
+ v16f64 = 103, // 16 x f64
+ v32f64 = 104, // 32 x f64
+ v64f64 = 105, // 64 x f64
+ v128f64 = 106, // 128 x f64
+ v256f64 = 107, // 256 x f64
+
+ FIRST_FP_FIXEDLEN_VECTOR_VALUETYPE = v1f16,
LAST_FP_FIXEDLEN_VECTOR_VALUETYPE = v256f64,
FIRST_FIXEDLEN_VECTOR_VALUETYPE = v1i1,
LAST_FIXEDLEN_VECTOR_VALUETYPE = v256f64,
- nxv1i1 = 107, // n x 1 x i1
- nxv2i1 = 108, // n x 2 x i1
- nxv4i1 = 109, // n x 4 x i1
- nxv8i1 = 110, // n x 8 x i1
- nxv16i1 = 111, // n x 16 x i1
- nxv32i1 = 112, // n x 32 x i1
- nxv64i1 = 113, // n x 64 x i1
-
- nxv1i8 = 114, // n x 1 x i8
- nxv2i8 = 115, // n x 2 x i8
- nxv4i8 = 116, // n x 4 x i8
- nxv8i8 = 117, // n x 8 x i8
- nxv16i8 = 118, // n x 16 x i8
- nxv32i8 = 119, // n x 32 x i8
- nxv64i8 = 120, // n x 64 x i8
-
- nxv1i16 = 121, // n x 1 x i16
- nxv2i16 = 122, // n x 2 x i16
- nxv4i16 = 123, // n x 4 x i16
- nxv8i16 = 124, // n x 8 x i16
- nxv16i16 = 125, // n x 16 x i16
- nxv32i16 = 126, // n x 32 x i16
-
- nxv1i32 = 127, // n x 1 x i32
- nxv2i32 = 128, // n x 2 x i32
- nxv4i32 = 129, // n x 4 x i32
- nxv8i32 = 130, // n x 8 x i32
- nxv16i32 = 131, // n x 16 x i32
- nxv32i32 = 132, // n x 32 x i32
-
- nxv1i64 = 133, // n x 1 x i64
- nxv2i64 = 134, // n x 2 x i64
- nxv4i64 = 135, // n x 4 x i64
- nxv8i64 = 136, // n x 8 x i64
- nxv16i64 = 137, // n x 16 x i64
- nxv32i64 = 138, // n x 32 x i64
+ nxv1i1 = 108, // n x 1 x i1
+ nxv2i1 = 109, // n x 2 x i1
+ nxv4i1 = 110, // n x 4 x i1
+ nxv8i1 = 111, // n x 8 x i1
+ nxv16i1 = 112, // n x 16 x i1
+ nxv32i1 = 113, // n x 32 x i1
+ nxv64i1 = 114, // n x 64 x i1
+
+ nxv1i8 = 115, // n x 1 x i8
+ nxv2i8 = 116, // n x 2 x i8
+ nxv4i8 = 117, // n x 4 x i8
+ nxv8i8 = 118, // n x 8 x i8
+ nxv16i8 = 119, // n x 16 x i8
+ nxv32i8 = 120, // n x 32 x i8
+ nxv64i8 = 121, // n x 64 x i8
+
+ nxv1i16 = 122, // n x 1 x i16
+ nxv2i16 = 123, // n x 2 x i16
+ nxv4i16 = 124, // n x 4 x i16
+ nxv8i16 = 125, // n x 8 x i16
+ nxv16i16 = 126, // n x 16 x i16
+ nxv32i16 = 127, // n x 32 x i16
+
+ nxv1i32 = 128, // n x 1 x i32
+ nxv2i32 = 129, // n x 2 x i32
+ nxv4i32 = 130, // n x 4 x i32
+ nxv8i32 = 131, // n x 8 x i32
+ nxv16i32 = 132, // n x 16 x i32
+ nxv32i32 = 133, // n x 32 x i32
+
+ nxv1i64 = 134, // n x 1 x i64
+ nxv2i64 = 135, // n x 2 x i64
+ nxv4i64 = 136, // n x 4 x i64
+ nxv8i64 = 137, // n x 8 x i64
+ nxv16i64 = 138, // n x 16 x i64
+ nxv32i64 = 139, // n x 32 x i64
FIRST_INTEGER_SCALABLE_VECTOR_VALUETYPE = nxv1i1,
LAST_INTEGER_SCALABLE_VECTOR_VALUETYPE = nxv32i64,
- nxv1f16 = 139, // n x 1 x f16
- nxv2f16 = 140, // n x 2 x f16
- nxv4f16 = 141, // n x 4 x f16
- nxv8f16 = 142, // n x 8 x f16
- nxv16f16 = 143, // n x 16 x f16
- nxv32f16 = 144, // n x 32 x f16
- nxv1bf16 = 145, // n x 1 x bf16
- nxv2bf16 = 146, // n x 2 x bf16
- nxv4bf16 = 147, // n x 4 x bf16
- nxv8bf16 = 148, // n x 8 x bf16
- nxv1f32 = 149, // n x 1 x f32
- nxv2f32 = 150, // n x 2 x f32
- nxv4f32 = 151, // n x 4 x f32
- nxv8f32 = 152, // n x 8 x f32
- nxv16f32 = 153, // n x 16 x f32
- nxv1f64 = 154, // n x 1 x f64
- nxv2f64 = 155, // n x 2 x f64
- nxv4f64 = 156, // n x 4 x f64
- nxv8f64 = 157, // n x 8 x f64
+ nxv1f16 = 140, // n x 1 x f16
+ nxv2f16 = 141, // n x 2 x f16
+ nxv4f16 = 142, // n x 4 x f16
+ nxv8f16 = 143, // n x 8 x f16
+ nxv16f16 = 144, // n x 16 x f16
+ nxv32f16 = 145, // n x 32 x f16
+ nxv1bf16 = 146, // n x 1 x bf16
+ nxv2bf16 = 147, // n x 2 x bf16
+ nxv4bf16 = 148, // n x 4 x bf16
+ nxv8bf16 = 149, // n x 8 x bf16
+ nxv1f32 = 150, // n x 1 x f32
+ nxv2f32 = 151, // n x 2 x f32
+ nxv4f32 = 152, // n x 4 x f32
+ nxv8f32 = 153, // n x 8 x f32
+ nxv16f32 = 154, // n x 16 x f32
+ nxv1f64 = 155, // n x 1 x f64
+ nxv2f64 = 156, // n x 2 x f64
+ nxv4f64 = 157, // n x 4 x f64
+ nxv8f64 = 158, // n x 8 x f64
FIRST_FP_SCALABLE_VECTOR_VALUETYPE = nxv1f16,
LAST_FP_SCALABLE_VECTOR_VALUETYPE = nxv8f64,
@@ -235,22 +236,22 @@ namespace llvm {
FIRST_VECTOR_VALUETYPE = v1i1,
LAST_VECTOR_VALUETYPE = nxv8f64,
- x86mmx = 158, // This is an X86 MMX value
+ x86mmx = 159, // This is an X86 MMX value
- Glue = 159, // This glues nodes together during pre-RA sched
+ Glue = 160, // This glues nodes together during pre-RA sched
- isVoid = 160, // This has no value
+ isVoid = 161, // This has no value
- Untyped = 161, // This value takes a register, but has
+ Untyped = 162, // This value takes a register, but has
// unspecified type. The register class
// will be determined by the opcode.
- funcref = 162, // WebAssembly's funcref type
- externref = 163, // WebAssembly's externref type
- x86amx = 164, // This is an X86 AMX value
+ funcref = 163, // WebAssembly's funcref type
+ externref = 164, // WebAssembly's externref type
+ x86amx = 165, // This is an X86 AMX value
FIRST_VALUETYPE = 1, // This is always the beginning of the list.
- LAST_VALUETYPE = 165, // This always remains at the end of the list.
+ LAST_VALUETYPE = 166, // This always remains at the end of the list.
// This is the current maximum for LAST_VALUETYPE.
// MVT::MAX_ALLOWED_VALUETYPE is used for asserts and to size bit vectors
@@ -357,7 +358,7 @@ namespace llvm {
/// Return true if this is a 16-bit vector type.
bool is16BitVector() const {
return (SimpleTy == MVT::v2i8 || SimpleTy == MVT::v1i16 ||
- SimpleTy == MVT::v16i1);
+ SimpleTy == MVT::v16i1 || SimpleTy == MVT::v1f16);
}
/// Return true if this is a 32-bit vector type.
@@ -578,6 +579,7 @@ namespace llvm {
case nxv16i64:
case nxv32i64: return i64;
case v1i128: return i128;
+ case v1f16:
case v2f16:
case v3f16:
case v4f16:
@@ -775,6 +777,7 @@ namespace llvm {
case v1i32:
case v1i64:
case v1i128:
+ case v1f16:
case v1f32:
case v1f64:
case nxv1i1:
@@ -839,7 +842,8 @@ namespace llvm {
case bf16:
case v16i1:
case v2i8:
- case v1i16: return TypeSize::Fixed(16);
+ case v1i16:
+ case v1f16: return TypeSize::Fixed(16);
case nxv16i1:
case nxv2i8:
case nxv1i16:
@@ -1176,6 +1180,7 @@ namespace llvm {
if (NumElements == 1) return MVT::v1i128;
break;
case MVT::f16:
+ if (NumElements == 1) return MVT::v1f16;
if (NumElements == 2) return MVT::v2f16;
if (NumElements == 3) return MVT::v3f16;
if (NumElements == 4) return MVT::v4f16;
diff --git a/llvm/lib/CodeGen/ValueTypes.cpp b/llvm/lib/CodeGen/ValueTypes.cpp
index 7f38420b8370..82aad5498e4f 100644
--- a/llvm/lib/CodeGen/ValueTypes.cpp
+++ b/llvm/lib/CodeGen/ValueTypes.cpp
@@ -305,6 +305,8 @@ Type *EVT::getTypeForEVT(LLVMContext &Context) const {
return FixedVectorType::get(Type::getInt64Ty(Context), 256);
case MVT::v1i128:
return FixedVectorType::get(Type::getInt128Ty(Context), 1);
+ case MVT::v1f16:
+ return FixedVectorType::get(Type::getHalfTy(Context), 1);
case MVT::v2f16:
return FixedVectorType::get(Type::getHalfTy(Context), 2);
case MVT::v3f16:
diff --git a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
index d0406b9e7b60..c0ca1a78cd34 100644
--- a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
@@ -7,7 +7,9 @@ declare half @llvm.vector.reduce.fadd.v1f16(half, <1 x half>)
define half @vreduce_fadd_v1f16(<1 x half>* %x, half %s) {
; CHECK-LABEL: vreduce_fadd_v1f16:
; CHECK: # %bb.0:
-; CHECK-NEXT: flh ft0, 0(a0)
+; CHECK-NEXT: vsetivli a1, 1, e16,m1,ta,mu
+; CHECK-NEXT: vle16.v v25, (a0)
+; CHECK-NEXT: vfmv.f.s ft0, v25
; CHECK-NEXT: fadd.h fa0, fa0, ft0
; CHECK-NEXT: ret
%v = load <1 x half>, <1 x half>* %x
@@ -18,8 +20,13 @@ define half @vreduce_fadd_v1f16(<1 x half>* %x, half %s) {
define half @vreduce_ord_fadd_v1f16(<1 x half>* %x, half %s) {
; CHECK-LABEL: vreduce_ord_fadd_v1f16:
; CHECK: # %bb.0:
-; CHECK-NEXT: flh ft0, 0(a0)
-; CHECK-NEXT: fadd.h fa0, fa0, ft0
+; CHECK-NEXT: vsetivli a1, 1, e16,m1,ta,mu
+; CHECK-NEXT: vle16.v v25, (a0)
+; CHECK-NEXT: vsetvli a0, zero, e16,m1,ta,mu
+; CHECK-NEXT: vfmv.v.f v26, fa0
+; CHECK-NEXT: vsetivli a0, 1, e16,m1,ta,mu
+; CHECK-NEXT: vfredosum.vs v25, v25, v26
+; CHECK-NEXT: vfmv.f.s fa0, v25
; CHECK-NEXT: ret
%v = load <1 x half>, <1 x half>* %x
%red = call half @llvm.vector.reduce.fadd.v1f16(half %s, <1 x half> %v)
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