[PATCH] D98031: [ARM] Add an optimization to avoid S-register forwarding hazards

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

Hello. There is the ExecutionDomainFix that tried to mitigate the same issue, but only for mov instructions I believe. There is also the A15SDOptimizer pass that does something similar. Is it possible to reuse/consolidate any of these?

As far as I understand, the cortex-a76 or newer will only see this hazarding between S and Q registers, not D regs, and even then will be less of an issue.

Also going via the integer registers sounds very slow, are you sure that would be better than hitting the hazard? I was told that using `vdup d0, d0[0]` may be a way to mitigate it, without resorting to using integer regs.


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