[llvm] cd938ab - [X86] canonicalizeShuffleWithBinOps - add X86ISD::PSHUFB handling.

[Benjamin Kramer via llvm-commits]

Seeing a miscompile caused by this change, I'll try to get a test case.

On Sun, Mar 7, 2021 at 2:04 PM Simon Pilgrim via llvm-commits
<llvm-commits at lists.llvm.org> wrote:
>
>
> Author: Simon Pilgrim
> Date: 2021-03-07T12:56:35Z
> New Revision: cd938ab162b0ac560dd0e9fee290980c7e0e47e5
>
> URL: https://github.com/llvm/llvm-project/commit/cd938ab162b0ac560dd0e9fee290980c7e0e47e5
> DIFF: https://github.com/llvm/llvm-project/commit/cd938ab162b0ac560dd0e9fee290980c7e0e47e5.diff
>
> LOG: [X86] canonicalizeShuffleWithBinOps - add X86ISD::PSHUFB handling.
>
> Added:
>
>
> Modified:
>     llvm/lib/Target/X86/X86ISelLowering.cpp
>     llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
>     llvm/test/CodeGen/X86/vector-shift-ashr-128.ll
>     llvm/test/CodeGen/X86/vector-shift-lshr-128.ll
>
> Removed:
>
>
>
> ################################################################################
> diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
> index 4ea79a4668ae..c24aa0f763c2 100644
> --- a/llvm/lib/Target/X86/X86ISelLowering.cpp
> +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
> @@ -36837,6 +36837,7 @@ static SDValue canonicalizeShuffleWithBinOps(SDValue N, SelectionDAG &DAG,
>    switch (Opc) {
>    case X86ISD::VBROADCAST:
>    case X86ISD::MOVDDUP:
> +  case X86ISD::PSHUFB:
>    case X86ISD::PSHUFD: {
>      if (N.getOperand(0).getValueType() == ShuffleVT &&
>          N->isOnlyUserOf(N.getOperand(0).getNode())) {
>
> diff  --git a/llvm/test/CodeGen/X86/vector-fshr-rot-128.ll b/llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
> index ea795d9b51f7..11753627a571 100644
> --- a/llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
> +++ b/llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
> @@ -1403,8 +1403,8 @@ define <16 x i8> @splatvar_funnnel_v16i8(<16 x i8> %x, <16 x i8> %amt) nounwind
>  ; XOPAVX1-LABEL: splatvar_funnnel_v16i8:
>  ; XOPAVX1:       # %bb.0:
>  ; XOPAVX1-NEXT:    vpxor %xmm2, %xmm2, %xmm2
> -; XOPAVX1-NEXT:    vpsubb %xmm1, %xmm2, %xmm1
>  ; XOPAVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
> +; XOPAVX1-NEXT:    vpsubb %xmm1, %xmm2, %xmm1
>  ; XOPAVX1-NEXT:    vprotb %xmm1, %xmm0, %xmm0
>  ; XOPAVX1-NEXT:    retq
>  ;
>
> diff  --git a/llvm/test/CodeGen/X86/vector-shift-ashr-128.ll b/llvm/test/CodeGen/X86/vector-shift-ashr-128.ll
> index ab84a589c2cd..cb3382cf20d6 100644
> --- a/llvm/test/CodeGen/X86/vector-shift-ashr-128.ll
> +++ b/llvm/test/CodeGen/X86/vector-shift-ashr-128.ll
> @@ -848,8 +848,8 @@ define <16 x i8> @splatvar_shift_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
>  ; XOPAVX1-LABEL: splatvar_shift_v16i8:
>  ; XOPAVX1:       # %bb.0:
>  ; XOPAVX1-NEXT:    vpxor %xmm2, %xmm2, %xmm2
> -; XOPAVX1-NEXT:    vpsubb %xmm1, %xmm2, %xmm1
>  ; XOPAVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
> +; XOPAVX1-NEXT:    vpsubb %xmm1, %xmm2, %xmm1
>  ; XOPAVX1-NEXT:    vpshab %xmm1, %xmm0, %xmm0
>  ; XOPAVX1-NEXT:    retq
>  ;
>
> diff  --git a/llvm/test/CodeGen/X86/vector-shift-lshr-128.ll b/llvm/test/CodeGen/X86/vector-shift-lshr-128.ll
> index 7cea8eb9e8b9..530ebbe60920 100644
> --- a/llvm/test/CodeGen/X86/vector-shift-lshr-128.ll
> +++ b/llvm/test/CodeGen/X86/vector-shift-lshr-128.ll
> @@ -698,8 +698,8 @@ define <16 x i8> @splatvar_shift_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
>  ; XOPAVX1-LABEL: splatvar_shift_v16i8:
>  ; XOPAVX1:       # %bb.0:
>  ; XOPAVX1-NEXT:    vpxor %xmm2, %xmm2, %xmm2
> -; XOPAVX1-NEXT:    vpsubb %xmm1, %xmm2, %xmm1
>  ; XOPAVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
> +; XOPAVX1-NEXT:    vpsubb %xmm1, %xmm2, %xmm1
>  ; XOPAVX1-NEXT:    vpshlb %xmm1, %xmm0, %xmm0
>  ; XOPAVX1-NEXT:    retq
>  ;
>
>
>
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