[PATCH] D98292: [RISCV] Manually split vector operands to VECREDUCE when handling vXi64 vectors on RV32.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 10 09:28:34 PST 2021
This revision was automatically updated to reflect the committed changes.
Closed by commit rG1e39118638cd: [RISCV] Manually split vector operands to VECREDUCE when handling vXi64 vectors… (authored by craig.topper).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D98292/new/
https://reviews.llvm.org/D98292
Files:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll
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