[PATCH] D95677: [AArch64][SVE] Add unpredicated ld1/st1 patterns for reg+reg addressing modes

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm added a comment.

Sorry I didn't mention this as part of my previous review but there should really be a test for each isel pattern.  These do exist for the imm variants, it is just they were added to spillfill-sve.ll instead of sve-ld1-addressing-mode-reg-imm.ll.  Given the name of the existing test file and the quantity of the new tests perhaps it is worth creating sve-ld1-addressing-mode-reg-reg.ll?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D95677/new/

https://reviews.llvm.org/D95677