[PATCH] D98308: [dfsan] Update fast16labels.ll test

[George Balatsouras via Phabricator via llvm-commits]

gbalats added inline comments.


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Comment at: llvm/test/Instrumentation/DataFlowSanitizer/fast16labels.ll:14
   ; CHECK-LABEL: define i8 @"dfs$add"
-  ; CHECK-DAG: %[[ALABEL:.*]] = load [[ST:.*]], [[ST]]* bitcast ([[VT:\[.*\]]]* @__dfsan_arg_tls to [[ST]]*), align [[ALIGN:2]]
-  ; CHECK-DAG: %[[BLABEL:.*]] = load [[ST]], [[ST]]* inttoptr (i64 add (i64 ptrtoint ([[VT]]* @__dfsan_arg_tls to i64), i64 2) to [[ST]]*), align [[ALIGN]]
+  ; CHECK-DAG: %[[ALABEL:.*]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN:2]]
+  ; CHECK-DAG: %[[BLABEL:.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([[TLS_ARR]]* @__dfsan_arg_tls to i64), i64 2) to i[[#SBITS]]*), align [[ALIGN]]
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stephan.yichao.zhao wrote:
> --> [[#SBYTES]]
I didn't change this as I intended to leave TLS alignment to 2. So far, I have been changing only alignments that are unrelated to `@__dfsan_.*_tls` stuff.


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Comment at: llvm/test/Instrumentation/DataFlowSanitizer/fast16labels.ll:110
+  ; COMM: On fast8, no need to OR the wide shadow but one more shift is needed.
+  ; CHECK8-NEXT: %[[#WS+1]]         = lshr i64 %[[#WS]], 32
+  ; CHECK8-NEXT: %[[#WS+2]]         = or i64 %[[#WS]], %[[#WS+1]]
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stephan.yichao.zhao wrote:
> Add these patterns after fast8 code is checked in?
> 
> This file could be renamed to fast_labels.ll to support both 16 and 8 bit modes later.
Yes. I agree about renaming. I intend to do it when introducing the fast8 mode.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D98308/new/

https://reviews.llvm.org/D98308