[llvm] 6a2bf59 - [dfsan] Update store.ll test
George Balatsouras via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 9 12:22:13 PST 2021
Author: George Balatsouras
Date: 2021-03-09T12:21:29-08:00
New Revision: 6a2bf59a62ad49144846abe4d5d3d259aa54f09b
URL: https://github.com/llvm/llvm-project/commit/6a2bf59a62ad49144846abe4d5d3d259aa54f09b
DIFF: https://github.com/llvm/llvm-project/commit/6a2bf59a62ad49144846abe4d5d3d259aa54f09b.diff
LOG: [dfsan] Update store.ll test
This removes hard-coded shadow width references and adds more RUN
lines to increase test coverage under different options (fast16 labels
mode).
Also, shortens the test by unifying common lines under both combine- and no-combine-ptr-label options.
Reviewed By: stephan.yichao.zhao
Differential Revision: https://reviews.llvm.org/D98227
Added:
Modified:
llvm/test/Instrumentation/DataFlowSanitizer/store.ll
Removed:
################################################################################
diff --git a/llvm/test/Instrumentation/DataFlowSanitizer/store.ll b/llvm/test/Instrumentation/DataFlowSanitizer/store.ll
index 2701f968f93d..a66b6c86dfde 100644
--- a/llvm/test/Instrumentation/DataFlowSanitizer/store.ll
+++ b/llvm/test/Instrumentation/DataFlowSanitizer/store.ll
@@ -1,166 +1,141 @@
-; RUN: opt < %s -dfsan -dfsan-combine-pointer-labels-on-store=1 -S | FileCheck %s --check-prefix=COMBINE_PTR_LABEL
-; RUN: opt < %s -dfsan -dfsan-combine-pointer-labels-on-store=0 -S | FileCheck %s --check-prefix=NO_COMBINE_PTR_LABEL
+; RUN: opt < %s -dfsan -dfsan-combine-pointer-labels-on-store=1 -S | FileCheck %s --check-prefixes=CHECK,CHECK16,COMBINE_PTR_LABEL
+; RUN: opt < %s -dfsan -dfsan-combine-pointer-labels-on-store=0 -S | FileCheck %s --check-prefixes=CHECK,CHECK16,NO_COMBINE_PTR_LABEL
+; RUN: opt < %s -dfsan -dfsan-fast-16-labels -dfsan-combine-pointer-labels-on-store=1 -S | FileCheck %s --check-prefixes=CHECK,CHECK16,COMBINE_PTR_LABEL_FAST
+; RUN: opt < %s -dfsan -dfsan-fast-16-labels -dfsan-combine-pointer-labels-on-store=0 -S | FileCheck %s --check-prefixes=CHECK,CHECK16,NO_COMBINE_PTR_LABEL
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
-define void @store0({} %v, {}* %p) {
- ; COMBINE_PTR_LABEL: @"dfs$store0"
- ; COMBINE_PTR_LABEL: store
- ; COMBINE_PTR_LABEL-NOT: store
+; CHECK: @__dfsan_shadow_width_bits = weak_odr constant i32 [[#SBITS:]]
+; CHECK: @__dfsan_shadow_width_bytes = weak_odr constant i32 [[#SBYTES:]]
- ; NO_COMBINE_PTR_LABEL: @"dfs$store0"
- ; NO_COMBINE_PTR_LABEL: store
- ; NO_COMBINE_PTR_LABEL-NOT: store
+define void @store0({} %v, {}* %p) {
+ ; CHECK-LABEL: @"dfs$store0"
+ ; CHECK: store {} %v, {}* %p
+ ; CHECK-NOT: store
+ ; CHECK: ret void
store {} %v, {}* %p
ret void
}
define void @store8(i8 %v, i8* %p) {
- ; NO_COMBINE_PTR_LABEL: @"dfs$store8"
- ; NO_COMBINE_PTR_LABEL: load i16, i16* {{.*}} @__dfsan_arg_tls
- ; NO_COMBINE_PTR_LABEL: ptrtoint i8* {{.*}} i64
- ; NO_COMBINE_PTR_LABEL: and i64
- ; NO_COMBINE_PTR_LABEL: mul i64
- ; NO_COMBINE_PTR_LABEL: inttoptr i64 {{.*}} i16*
- ; NO_COMBINE_PTR_LABEL: getelementptr i16, i16*
- ; NO_COMBINE_PTR_LABEL: store i16
- ; NO_COMBINE_PTR_LABEL: store i8
-
- ; COMBINE_PTR_LABEL: @"dfs$store8"
- ; COMBINE_PTR_LABEL: load i16, i16*
- ; COMBINE_PTR_LABEL: load i16, i16*
- ; COMBINE_PTR_LABEL: icmp ne i16
+ ; CHECK-LABEL: @"dfs$store8"
+ ; CHECK: load i[[#SBITS]], i[[#SBITS]]* {{.*}} @__dfsan_arg_tls
+
+ ; COMBINE_PTR_LABEL: load i[[#SBITS]], i[[#SBITS]]* {{.*}} @__dfsan_arg_tls
+ ; COMBINE_PTR_LABEL: icmp ne i[[#SBITS]]
; COMBINE_PTR_LABEL: call {{.*}} @__dfsan_union
- ; COMBINE_PTR_LABEL: ptrtoint i8* {{.*}} i64
- ; COMBINE_PTR_LABEL: and i64
- ; COMBINE_PTR_LABEL: mul i64
- ; COMBINE_PTR_LABEL: inttoptr i64 {{.*}} i16*
- ; COMBINE_PTR_LABEL: getelementptr i16, i16*
- ; COMBINE_PTR_LABEL: store i16
- ; COMBINE_PTR_LABEL: store i8
+
+ ; COMM: When not in legacy mode, the three instructions above will
+ ; be replaced with the following:
+ ; COMBINE_PTR_LABEL_FAST: load i[[#SBITS]], i[[#SBITS]]* {{.*}} @__dfsan_arg_tls
+ ; COMBINE_PTR_LABEL_FAST: or i[[#SBITS]]
+
+ ; CHECK: ptrtoint i8* {{.*}} i64
+ ; CHECK-NEXT: and i64
+ ; CHECK16-NEXT: mul i64
+ ; CHECK-NEXT: inttoptr i64 {{.*}} i[[#SBITS]]*
+ ; CHECK-NEXT: getelementptr i[[#SBITS]], i[[#SBITS]]*
+ ; CHECK-NEXT: store i[[#SBITS]]
+ ; CHECK-NEXT: store i8 %v, i8* %p
+ ; CHECK-NEXT: ret void
store i8 %v, i8* %p
ret void
}
define void @store16(i16 %v, i16* %p) {
- ; NO_COMBINE_PTR_LABEL: @"dfs$store16"
- ; NO_COMBINE_PTR_LABEL: load i16, i16* {{.*}} @__dfsan_arg_tls
- ; NO_COMBINE_PTR_LABEL: ptrtoint i16* {{.*}} i64
- ; NO_COMBINE_PTR_LABEL: and i64
- ; NO_COMBINE_PTR_LABEL: mul i64
- ; NO_COMBINE_PTR_LABEL: inttoptr i64 {{.*}} i16*
- ; NO_COMBINE_PTR_LABEL: getelementptr i16, i16*
- ; NO_COMBINE_PTR_LABEL: store i16
- ; NO_COMBINE_PTR_LABEL: getelementptr i16, i16*
- ; NO_COMBINE_PTR_LABEL: store i16
- ; NO_COMBINE_PTR_LABEL: store i16
-
- ; COMBINE_PTR_LABEL: @"dfs$store16"
- ; COMBINE_PTR_LABEL: load i16, i16* {{.*}} @__dfsan_arg_tls
- ; COMBINE_PTR_LABEL: load i16, i16* {{.*}} @__dfsan_arg_tls
- ; COMBINE_PTR_LABEL: icmp ne i16
+ ; CHECK-LABEL: @"dfs$store16"
+ ; CHECK: load i[[#SBITS]], i[[#SBITS]]* {{.*}} @__dfsan_arg_tls
+
+ ; COMBINE_PTR_LABEL: load i[[#SBITS]], i[[#SBITS]]* {{.*}} @__dfsan_arg_tls
+ ; COMBINE_PTR_LABEL: icmp ne i[[#SBITS]]
; COMBINE_PTR_LABEL: call {{.*}} @__dfsan_union
- ; COMBINE_PTR_LABEL: ptrtoint i16* {{.*}} i64
- ; COMBINE_PTR_LABEL: and i64
- ; COMBINE_PTR_LABEL: mul i64
- ; COMBINE_PTR_LABEL: inttoptr i64 {{.*}} i16*
- ; COMBINE_PTR_LABEL: getelementptr i16, i16*
- ; COMBINE_PTR_LABEL: store i16
- ; COMBINE_PTR_LABEL: getelementptr i16, i16*
- ; COMBINE_PTR_LABEL: store i16
- ; COMBINE_PTR_LABEL: store i16
+
+ ; COMM: When not in legacy mode, the three instructions above will
+ ; be replaced with the following:
+ ; COMBINE_PTR_LABEL_FAST: load i[[#SBITS]], i[[#SBITS]]* {{.*}} @__dfsan_arg_tls
+ ; COMBINE_PTR_LABEL_FAST: or i[[#SBITS]]
+
+ ; CHECK: ptrtoint i16* {{.*}} i64
+ ; CHECK-NEXT: and i64
+ ; CHECK16-NEXT: mul i64
+ ; CHECK-NEXT: inttoptr i64 {{.*}} i[[#SBITS]]*
+ ; CHECK-NEXT: getelementptr i[[#SBITS]], i[[#SBITS]]*
+ ; CHECK-NEXT: store i[[#SBITS]]
+ ; CHECK-NEXT: getelementptr i[[#SBITS]], i[[#SBITS]]*
+ ; CHECK-NEXT: store i[[#SBITS]]
+ ; CHECK-NEXT: store i16 %v, i16* %p
+ ; CHECK-NEXT: ret void
store i16 %v, i16* %p
ret void
}
define void @store32(i32 %v, i32* %p) {
- ; NO_COMBINE_PTR_LABEL: @"dfs$store32"
- ; NO_COMBINE_PTR_LABEL: load i16, i16* {{.*}} @__dfsan_arg_tls
- ; NO_COMBINE_PTR_LABEL: ptrtoint i32* {{.*}} i64
- ; NO_COMBINE_PTR_LABEL: and i64
- ; NO_COMBINE_PTR_LABEL: mul i64
- ; NO_COMBINE_PTR_LABEL: inttoptr i64 {{.*}} i16*
- ; NO_COMBINE_PTR_LABEL: getelementptr i16, i16*
- ; NO_COMBINE_PTR_LABEL: store i16
- ; NO_COMBINE_PTR_LABEL: getelementptr i16, i16*
- ; NO_COMBINE_PTR_LABEL: store i16
- ; NO_COMBINE_PTR_LABEL: getelementptr i16, i16*
- ; NO_COMBINE_PTR_LABEL: store i16
- ; NO_COMBINE_PTR_LABEL: getelementptr i16, i16*
- ; NO_COMBINE_PTR_LABEL: store i16
- ; NO_COMBINE_PTR_LABEL: store i32
-
- ; COMBINE_PTR_LABEL: @"dfs$store32"
- ; COMBINE_PTR_LABEL: load i16, i16* {{.*}} @__dfsan_arg_tls
- ; COMBINE_PTR_LABEL: load i16, i16* {{.*}} @__dfsan_arg_tls
- ; COMBINE_PTR_LABEL: icmp ne i16
+ ; CHECK-LABEL: @"dfs$store32"
+ ; CHECK: load i[[#SBITS]], i[[#SBITS]]* {{.*}} @__dfsan_arg_tls
+
+ ; COMBINE_PTR_LABEL: load i[[#SBITS]], i[[#SBITS]]* {{.*}} @__dfsan_arg_tls
+ ; COMBINE_PTR_LABEL: icmp ne i[[#SBITS]]
; COMBINE_PTR_LABEL: call {{.*}} @__dfsan_union
- ; COMBINE_PTR_LABEL: ptrtoint i32* {{.*}} i64
- ; COMBINE_PTR_LABEL: and i64
- ; COMBINE_PTR_LABEL: mul i64
- ; COMBINE_PTR_LABEL: inttoptr i64 {{.*}} i16*
- ; COMBINE_PTR_LABEL: getelementptr i16, i16*
- ; COMBINE_PTR_LABEL: store i16
- ; COMBINE_PTR_LABEL: getelementptr i16, i16*
- ; COMBINE_PTR_LABEL: store i16
- ; COMBINE_PTR_LABEL: getelementptr i16, i16*
- ; COMBINE_PTR_LABEL: store i16
- ; COMBINE_PTR_LABEL: getelementptr i16, i16*
- ; COMBINE_PTR_LABEL: store i16
- ; COMBINE_PTR_LABEL: store i32
+
+ ; COMM: When not in legacy mode, the three instructions above will
+ ; be replaced with the following:
+ ; COMBINE_PTR_LABEL_FAST: load i[[#SBITS]], i[[#SBITS]]* {{.*}} @__dfsan_arg_tls
+ ; COMBINE_PTR_LABEL_FAST: or i[[#SBITS]]
+
+ ; CHECK: ptrtoint i32* {{.*}} i64
+ ; CHECK-NEXT: and i64
+ ; CHECK16-NEXT: mul i64
+ ; CHECK-NEXT: inttoptr i64 {{.*}} i[[#SBITS]]*
+ ; CHECK-NEXT: getelementptr i[[#SBITS]], i[[#SBITS]]*
+ ; CHECK-NEXT: store i[[#SBITS]]
+ ; CHECK-NEXT: getelementptr i[[#SBITS]], i[[#SBITS]]*
+ ; CHECK-NEXT: store i[[#SBITS]]
+ ; CHECK-NEXT: getelementptr i[[#SBITS]], i[[#SBITS]]*
+ ; CHECK-NEXT: store i[[#SBITS]]
+ ; CHECK-NEXT: getelementptr i[[#SBITS]], i[[#SBITS]]*
+ ; CHECK-NEXT: store i[[#SBITS]]
+ ; CHECK-NEXT: store i32 %v, i32* %p
+ ; CHECK-NEXT: ret void
store i32 %v, i32* %p
ret void
}
define void @store64(i64 %v, i64* %p) {
- ; NO_COMBINE_PTR_LABEL: @"dfs$store64"
- ; NO_COMBINE_PTR_LABEL: load i16, i16* {{.*}} @__dfsan_arg_tls
- ; NO_COMBINE_PTR_LABEL: ptrtoint i64* {{.*}} i64
- ; NO_COMBINE_PTR_LABEL: and i64
- ; NO_COMBINE_PTR_LABEL: mul i64
- ; NO_COMBINE_PTR_LABEL: inttoptr i64 {{.*}} i16*
- ; NO_COMBINE_PTR_LABEL: insertelement {{.*}} i16
- ; NO_COMBINE_PTR_LABEL: insertelement {{.*}} i16
- ; NO_COMBINE_PTR_LABEL: insertelement {{.*}} i16
- ; NO_COMBINE_PTR_LABEL: insertelement {{.*}} i16
- ; NO_COMBINE_PTR_LABEL: insertelement {{.*}} i16
- ; NO_COMBINE_PTR_LABEL: insertelement {{.*}} i16
- ; NO_COMBINE_PTR_LABEL: insertelement {{.*}} i16
- ; NO_COMBINE_PTR_LABEL: insertelement {{.*}} i16
- ; NO_COMBINE_PTR_LABEL: bitcast i16* {{.*}} <8 x i16>*
- ; NO_COMBINE_PTR_LABEL: store i64
-
- ; COMBINE_PTR_LABEL: @"dfs$store64"
- ; COMBINE_PTR_LABEL: load i16, i16* {{.*}} @__dfsan_arg_tls
- ; COMBINE_PTR_LABEL: load i16, i16* {{.*}} @__dfsan_arg_tls
- ; COMBINE_PTR_LABEL: icmp ne i16
+ ; CHECK-LABEL: @"dfs$store64"
+ ; CHECK: load i[[#SBITS]], i[[#SBITS]]* {{.*}} @__dfsan_arg_tls
+
+ ; COMBINE_PTR_LABEL: load i[[#SBITS]], i[[#SBITS]]* {{.*}} @__dfsan_arg_tls
+ ; COMBINE_PTR_LABEL: icmp ne i[[#SBITS]]
; COMBINE_PTR_LABEL: call {{.*}} @__dfsan_union
- ; COMBINE_PTR_LABEL: ptrtoint i64* {{.*}} i64
- ; COMBINE_PTR_LABEL: and i64
- ; COMBINE_PTR_LABEL: mul i64
- ; COMBINE_PTR_LABEL: inttoptr i64 {{.*}} i16*
- ; COMBINE_PTR_LABEL: insertelement {{.*}} i16
- ; COMBINE_PTR_LABEL: insertelement {{.*}} i16
- ; COMBINE_PTR_LABEL: insertelement {{.*}} i16
- ; COMBINE_PTR_LABEL: insertelement {{.*}} i16
- ; COMBINE_PTR_LABEL: insertelement {{.*}} i16
- ; COMBINE_PTR_LABEL: insertelement {{.*}} i16
- ; COMBINE_PTR_LABEL: insertelement {{.*}} i16
- ; COMBINE_PTR_LABEL: insertelement {{.*}} i16
- ; COMBINE_PTR_LABEL: bitcast i16* {{.*}} <8 x i16>*
- ; COMBINE_PTR_LABEL: store <8 x i16>
- ; COMBINE_PTR_LABEL: store i64
+
+ ; COMM: When not in legacy mode, the three instructions above will
+ ; be replaced with the following:
+ ; COMBINE_PTR_LABEL_FAST: load i[[#SBITS]], i[[#SBITS]]* {{.*}} @__dfsan_arg_tls
+ ; COMBINE_PTR_LABEL_FAST: or i[[#SBITS]]
+
+ ; CHECK: ptrtoint i64* {{.*}} i64
+ ; CHECK-NEXT: and i64
+ ; CHECK16-NEXT: mul i64
+ ; CHECK-NEXT: inttoptr i64 {{.*}} i[[#SBITS]]*
+ ; CHECK-COUNT-8: insertelement {{.*}} i[[#SBITS]]
+ ; CHECK-NEXT: bitcast i[[#SBITS]]* {{.*}} <8 x i[[#SBITS]]>*
+ ; CHECK-NEXT: getelementptr <8 x i[[#SBITS]]>
+ ; CHECK-NEXT: store <8 x i[[#SBITS]]>
+ ; CHECK-NEXT: store i64 %v, i64* %p
+ ; CHECK-NEXT: ret void
store i64 %v, i64* %p
ret void
}
define void @store_zero(i32* %p) {
- ; NO_COMBINE_PTR_LABEL: store i64 0, i64* {{.*}}, align 2
+ ; CHECK-LABEL: @"dfs$store_zero"
+ ; NO_COMBINE_PTR_LABEL: bitcast i[[#SBITS]]* {{.*}} to i[[#mul(4, SBITS)]]*
+ ; NO_COMBINE_PTR_LABEL: store i[[#mul(4, SBITS)]] 0, i[[#mul(4, SBITS)]]* {{.*}}
store i32 0, i32* %p
ret void
-}
\ No newline at end of file
+}
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