[llvm] b70e02a - [X86][NFC] Move instruction selection of the x86_tdpb[s,u]d_internal and x86_tilezero_internal to X86InstrAMX.td
via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 9 05:28:46 PST 2021
Author: Liu, Chen3
Date: 2021-03-09T21:27:39+08:00
New Revision: b70e02a7e73caaa69e4675f6356f825dec04a451
URL: https://github.com/llvm/llvm-project/commit/b70e02a7e73caaa69e4675f6356f825dec04a451
DIFF: https://github.com/llvm/llvm-project/commit/b70e02a7e73caaa69e4675f6356f825dec04a451.diff
LOG: [X86][NFC] Move instruction selection of the x86_tdpb[s,u]d_internal and x86_tilezero_internal to X86InstrAMX.td
Differential Revision: https://reviews.llvm.org/D97997
Added:
Modified:
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
llvm/lib/Target/X86/X86InstrAMX.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
index 29e71c977658..8985041db948 100644
--- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -4622,45 +4622,6 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
ReplaceNode(Node, CNode);
return;
}
-
- case Intrinsic::x86_tdpbssd_internal:
- case Intrinsic::x86_tdpbsud_internal:
- case Intrinsic::x86_tdpbusd_internal:
- case Intrinsic::x86_tdpbuud_internal: {
- if (!Subtarget->hasAMXINT8())
- break;
- SDValue Chain = Node->getOperand(0);
- unsigned Opc;
- switch (IntNo) {
- case Intrinsic::x86_tdpbssd_internal: Opc = X86::PTDPBSSDV; break;
- case Intrinsic::x86_tdpbsud_internal: Opc = X86::PTDPBSUDV; break;
- case Intrinsic::x86_tdpbusd_internal: Opc = X86::PTDPBUSDV; break;
- case Intrinsic::x86_tdpbuud_internal: Opc = X86::PTDPBUUDV; break;
- default: llvm_unreachable("Impossible intrinsic");
- }
- SDValue Ops[] = {Node->getOperand(2),
- Node->getOperand(3),
- Node->getOperand(4),
- Node->getOperand(5),
- Node->getOperand(6),
- Node->getOperand(7),
- Chain};
- MachineSDNode *CNode =
- CurDAG->getMachineNode(Opc, dl, {MVT::x86amx, MVT::Other}, Ops);
- ReplaceNode(Node, CNode);
- return;
- }
- case Intrinsic::x86_tilezero_internal: {
- if (!Subtarget->hasAMXTILE())
- break;
- unsigned Opc = X86::PTILEZEROV;
- SDValue Chain = Node->getOperand(0);
- SDValue Ops[] = {Node->getOperand(2), Node->getOperand(3), Chain};
- MachineSDNode *CNode =
- CurDAG->getMachineNode(Opc, dl, {MVT::x86amx, MVT::Other}, Ops);
- ReplaceNode(Node, CNode);
- return;
- }
}
break;
}
diff --git a/llvm/lib/Target/X86/X86InstrAMX.td b/llvm/lib/Target/X86/X86InstrAMX.td
index 1a31ffa9d787..dd1590f6d589 100644
--- a/llvm/lib/Target/X86/X86InstrAMX.td
+++ b/llvm/lib/Target/X86/X86InstrAMX.td
@@ -48,15 +48,16 @@ let Predicates = [HasAMXTILE, In64BitMode] in {
VEX, T8XD;
// Pseduo instruction for RA.
- def PTILELOADDV : PseudoI<(outs TILE: $dst), (ins GR16:$src1,
- GR16:$src2,
- opaquemem:$src3), []>;
+ def PTILELOADDV : PseudoI<(outs TILE:$dst), (ins GR16:$src1,
+ GR16:$src2,
+ opaquemem:$src3), []>;
def PTILESTOREDV : PseudoI<(outs), (ins GR16:$src1,
GR16:$src2, opaquemem:$src3,
TILE:$src4), []>;
let isReMaterializable = 1, isAsCheapAsAMove = 1, canFoldAsLoad = 1 in
- def PTILEZEROV : PseudoI<(outs TILE: $dst), (ins GR16:$src1,
- GR16:$src2), []>;
+ def PTILEZEROV : PseudoI<(outs TILE:$dst), (ins GR16:$src1, GR16:$src2),
+ [(set TILE:$dst, (int_x86_tilezero_internal
+ GR16:$src1, GR16:$src2))]>;
let usesCustomInserter = 1 in {
// Pseudo instructions, using immediates instead of tile registers.
@@ -94,18 +95,30 @@ let Predicates = [HasAMXINT8, In64BitMode] in {
// Pseduo instruction for RA.
let Constraints = "$src4 = $dst" in {
- def PTDPBSSDV : PseudoI<(outs TILE: $dst), (ins GR16:$src1,
+ def PTDPBSSDV : PseudoI<(outs TILE:$dst), (ins GR16:$src1,
GR16:$src2, GR16:$src3, TILE:$src4,
- TILE:$src5, TILE:$src6), []>;
+ TILE:$src5, TILE:$src6),
+ [(set TILE: $dst,
+ (int_x86_tdpbssd_internal GR16:$src1, GR16:$src2,
+ GR16:$src3, TILE:$src4, TILE:$src5, TILE:$src6))]>;
def PTDPBSUDV : PseudoI<(outs TILE: $dst), (ins GR16:$src1,
GR16:$src2, GR16:$src3, TILE:$src4,
- TILE:$src5, TILE:$src6), []>;
+ TILE:$src5, TILE:$src6),
+ [(set TILE: $dst,
+ (int_x86_tdpbsud_internal GR16:$src1, GR16:$src2,
+ GR16:$src3, TILE:$src4, TILE:$src5, TILE:$src6))]>;
def PTDPBUSDV : PseudoI<(outs TILE: $dst), (ins GR16:$src1,
GR16:$src2, GR16:$src3, TILE:$src4,
- TILE:$src5, TILE:$src6), []>;
+ TILE:$src5, TILE:$src6),
+ [(set TILE: $dst,
+ (int_x86_tdpbusd_internal GR16:$src1, GR16:$src2,
+ GR16:$src3, TILE:$src4, TILE:$src5, TILE:$src6))]>;
def PTDPBUUDV : PseudoI<(outs TILE: $dst), (ins GR16:$src1,
GR16:$src2, GR16:$src3, TILE:$src4,
- TILE:$src5, TILE:$src6), []>;
+ TILE:$src5, TILE:$src6),
+ [(set TILE: $dst,
+ (int_x86_tdpbuud_internal GR16:$src1, GR16:$src2,
+ GR16:$src3, TILE:$src4, TILE:$src5, TILE:$src6))]>;
}
let usesCustomInserter = 1 in {
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