[PATCH] D97609: [RISCV] Add support for VECTOR_REVERSE for scalable vector types.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 8 14:19:23 PST 2021


craig.topper updated this revision to Diff 329141.
craig.topper added a comment.

Handle VLMAX>=256 for SEW=8 by checking -riscv-v-vector-bits-max.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D97609/new/

https://reviews.llvm.org/D97609

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
  llvm/test/CodeGen/RISCV/rvv/named-vector-shuffle-reverse.ll
  llvm/utils/TableGen/CodeGenDAGPatterns.cpp

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D97609.329141.patch
Type: text/x-patch
Size: 59992 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210308/03142a70/attachment.bin>


More information about the llvm-commits mailing list